PSB2115FV1.2D Lantiq, PSB2115FV1.2D Datasheet - Page 110
PSB2115FV1.2D
Manufacturer Part Number
PSB2115FV1.2D
Description
Manufacturer
Lantiq
Datasheet
1.PSB2115FV1.2D.pdf
(317 pages)
Specifications of PSB2115FV1.2D
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Semiconductor Group
2.6.7
The IPAC provides two timers which can be used for various purposes:
Timer 1 provides two modes of operation which can be selected by the ’Timer Mode’ bit
in MODED register (figure 48):
Figure 48
1. Internal Timer Mode (MODED:TMD=1)
In the internal mode the timer is used internally by the IPAC D-channel controller
for timeout and retry conditions for handling of LAPD/HDLC protocol, i.e. this
mode is only used in automode.
The number of S commands ’N1’ which are transmitted autonomously by the
IPAC after expiration of time period T1 (see note) is indicated in parameter CNT.
The internal prodedure is started after begin of an I-frame transmission or after
Timer Modes
Timer 1 Register
TIMR1 - Timer 1 Register (Adr. A3
TIMR2 - Timer 2 Register (Adr. CC
110
H
H
)
)
Functional Description
PSB 2115
PSF 2115
11.97
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