PSB2115FV1.2D Lantiq, PSB2115FV1.2D Datasheet - Page 232

• Manufacturer Part Number: PSB2115FV1.2D
• Manufacturer: Lantiq

Specifications of PSB2115FV1.2D

• Lead Free Status / Rohs Status: Supplier Unconfirmed

4.2.18
Value after reset: 000xxxxx
RBCHB
DMA … DMA Mode
Contains the read back value from register XBCH, which selects between interrupt or
DMA mode.
OV … Counter Overflow
More than 4095 bytes received!
The received frame exceeded the byte count in RBC11 … RBC0.
RBC11 … RBC8 … Receive Byte Count (most significant bits)
Together with RBCLB (bits RBC7 … RBC0) the length of the received frame can be
determined.
4.2.19
Value after reset: 0000xxxx
XBCH
DMA … DMA Mode
Selects the data transfer mode between the IPAC and the host system.
0 ... Interrupt controlled data transfer (interrupt mode)
1 ... DMA controlled data transfer (DMA mode)
XC … Transmit Continuously
Only valid if DMA mode is selected (DMA=1):
If the XC bit is set, the IPAC continuously requests for transmit data ignoring the transmit
byte count programmed via XBCH and XBCL.
Semiconductor Group
RBCHB - Received Byte Count High for B-Channel (READ)
7
XBCH - Transmit Byte Count High (WRITE)
7
DMA
DMA
0
0
0
0
OV
XC
3
3
232
RBC11
XBC11
Detailed Register Description
0
0
RBC8
XBC8
PSB 2115
PSF 2115
(2D/6D)
(2D/6D)
11.97