PSB2115FV1.2D Lantiq, PSB2115FV1.2D Datasheet - Page 22
PSB2115FV1.2D
Manufacturer Part Number
PSB2115FV1.2D
Description
Manufacturer
Lantiq
Datasheet
1.PSB2115FV1.2D.pdf
(317 pages)
Specifications of PSB2115FV1.2D
Lead Free Status / Rohs Status
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Semiconductor Group
Pin No. Symbol Input (I)
64
63
62
AUX3
AUX4
AUX5
Output (O)
I/O
I/O
I/O
Function
Auxiliary Port 3
TE-Mode: AUX3 (input/output)
This pin is programmable as general input/output. The
state of the pin can be read from (input) / written to
(output) a register.
LT-T/LT-S Mode: FBOUT (output)
FSC/BCL Output
This pin is programmable to output either an FSC clock
which is derived from the DCL input divided by 192 (in
LT-T: SCLK output provides 1.536 MHz) or a single bit
clock from the IOM-2 interface, especially to serve non
IOM-2 compatible peripheral devices on the PCM
interface.
Auxiliary Port 4
TE-Mode: AUX4 (input/output)
This pin is programmable as general input/output. The
state of the pin can be read from (input) / written to
(output) a register.
LT-T/LT-S Mode: PCMIN (input)
PCM Data Input
On this line the IPAC receives 8-bit data, which is
transmitted from a peripheral device. This data is
mapped to a B-Channel timeslot on IOM-2.
Auxiliary Port 5
TE-Mode: AUX5 (input/output)
This pin is programmable as general input/output. The
state of the pin can be read from (input) / written to
(output) a register.
LT-T/LT-S Mode: PCMOUT (output)
PCM Data Output
On this line the IPAC transmits 8-bit data, which is
received by a peripheral device. This data is taken from
a B-Channel timeslot on IOM-2.
22
PSB 2115
PSF 2115
Overview
11.97
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