PSB2115FV1.2D Lantiq, PSB2115FV1.2D Datasheet - Page 15
PSB2115FV1.2D
Manufacturer Part Number
PSB2115FV1.2D
Description
Manufacturer
Lantiq
Datasheet
1.PSB2115FV1.2D.pdf
(317 pages)
Specifications of PSB2115FV1.2D
Lead Free Status / Rohs Status
Supplier Unconfirmed
- Current page: 15 of 317
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1.1
• Single chip host based ISDN solution
• Integrates S-transceiver, D-channel, B-channel
• Replaces solutions based on ISAC-S TE PSB 2186
• Easy adjustment of software using ISAC-S and
• Various types of protocol support depending on
• Efficient transfer of data blocks from/to system
• Enlarged FIFO buffers (2x64 byte) per B-channel
• S-transceiver with TE, LT-S and LT-T modes
• D-channel FIFO buffers with 2x32byte
• D-channel access mechanism in all modes
• D-channel priority handler on IOM-2 for intelligent
ISDN PC Adapter Circuit
IPAC
Version 1.1
• Software reset (required for Windows95)
• Programmable I/O interface with 2 interrupt inputs
• PCM interface for non IOM-2 compatible peripheral data controllers
• Programmable timer (1 ... 63 ms) for continuous or single interrupts
• Reduced register address space due to indirect address mode option
• 3 programmable LED outputs, one can indicate S bus activation status automatically
• 8-bit multiplexed or demultiplexed bus interface
• Siemens/Intel or Motorola P interface
Semiconductor Group
protocol controller
and HSCX-TE PSB 21525
HSCX-TE
operating mode (Non-auto mode, transparent
mode)
memory by DMA or interrupt request
and per direction
NT applications
Features
15
P-MQFP-64
P-TQFP-64
PSB 2115
PSF 2115
CMOS
11.97
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