PSB2115FV1.2D Lantiq, PSB2115FV1.2D Datasheet - Page 62

• Manufacturer Part Number: PSB2115FV1.2D
• Manufacturer: Lantiq

Specifications of PSB2115FV1.2D

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Semiconductor Group
2. Terminal Transmits D-Channel Data Upstream
The initial state is identical to that described in the last paragraph. When one of the
connected S-bus terminals needs to transmit in the D-channel, access is established
according to the following procedure:
• IPAC S-transceiver (in intelligent NT) recognizes that the D-channel on the S-bus is
• IPAC S-transceiver sets S/G = 1 to block local D-channel sources.
• IPAC S-transceiver transfers S-bus D-channel data transparently through to the
• After D-channel transmission has been completed by the terminal and the IPAC
For both cases described above the exchange indicates via the A/B bit (controlled by
layer 1) that D-channel transmission on this line is permitted (A/B = “1”). Data
transmission could temporarily be prohibited by the exchange when only a single
D-channel controller handles more lines (A/B = “0”, ELIC-concept).
In case the exchange prohibits D data transmission on this line the A/B bit is set to “0”
(block). For U
transceiver to transmit an inverted echo channel on the S-bus, thus disabling all terminal
requests, and switches S/G to A/B, which blocks the D-channel controller in the
intelligent NT.
Note: Although the IPAC S-transceiver operates in LT-S mode and is pinstrapped to
active.
upstream IOM-2 bus (IOM-2 channel 0).
S-transceiver in the intelligent NT recognizes the idle condition (i.e. eight consecutive
D=1) on the S-bus D-channel, the S/G bit is set to ZERO.
IOM-2 channel 0 or 1 it will write into IOM-2 channel 2 at the S/G bit position.
PN
applications with S extension this forces the intelligent NT IPAC S-
62
Functional Description
PSB 2115
PSF 2115
11.97