PSB2115FV1.2D Lantiq, PSB2115FV1.2D Datasheet - Page 144

• Manufacturer Part Number: PSB2115FV1.2D
• Manufacturer: Lantiq

Specifications of PSB2115FV1.2D

• Lead Free Status / Rohs Status: Supplier Unconfirmed

For all modes two pins can be used as programmable I/O with optional interrupt input
capability (default after reset, i.e. both interrupts masked).
The INT0/1 pins are general input or output pins like AUX2-5 (see description above).
In addition to that, as inputs they can generate an interrupt to the host (ISTA:INT0/1)
which is maskable in MASK:INT0/1. The interrupt input is either edge or level triggered
(ACFG:EL0/1).
As outputs both pins are able to sink I
LEDs in standalone applications for example.
In LT-T mode pin AUX7 provides the additional capability to output the S/G bit from the
IOM-2 interface by setting CONF:SGO=1. This may be used for test purposes.
DRQTA, DRQRA (TE mode)
For B-channel B DMA pins are always available, whereas for channel A the availability
depends on the mode of operation.
In TE mode DRQTA and DRQRA are additionally available for the DMA interface, so
both B-channels can be operated in DMA mode.
In LT-T and LT-S mode only B-channel B can be operated by DMA data transfer.
Data transfer by DMA is described in detail in chapter 2.6.5 DMA Interface.
Figure 69
INT0, INT1 (all modes), INT1/SGOUT (LT-T mode)
Semiconductor Group
Input/Output Characteristic of AUX Pins
OL
= 5 mA which allows for direct connection of
144
Functional Description
PSB 2115
PSF 2115
11.97