PSB2115FV1.2D Lantiq, PSB2115FV1.2D Datasheet - Page 41
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PSB2115FV1.2D
Manufacturer Part Number
PSB2115FV1.2D
Description
Manufacturer
Lantiq
Datasheet
1.PSB2115FV1.2D.pdf
(317 pages)
Specifications of PSB2115FV1.2D
Lead Free Status / Rohs Status
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PSB 2115
PSF 2115
Functional Description
– RME interrupt, and the
– RAB bit in RSTA register is set!
To distinguish between frames really aborted from the opposite station, the receive byte
count (readable from RBCHB, RBCLB registers) exceeds the maximum receive length
(via RL5 … RL0) by one or two bytes in this case.
The check includes all data that is copied into the RFIFOB. It does not include the
address byte(s) if address recognition is selected. It includes the RSTAB value in all
operating modes.
2.1.12
Data Inversion
When NRZ data encoding has been selected, the IPAC may transmit and receive data
inverted, i.e. a ‘one’ bit is transmitted as phys. zero (0 V) and a ‘zero’ bit as phys. one (+
5 V) via the DU line.
Figure 13
Data Inversion
This feature is selected by setting the DIV bit in the CCR2 register.
Semiconductor Group
41
11.97
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