PSB21383HV1.3XT Infineon Technologies, PSB21383HV1.3XT Datasheet - Page 219
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PSB21383HV1.3XT
Manufacturer Part Number
PSB21383HV1.3XT
Description
Manufacturer
Infineon Technologies
Datasheet
1.PSB21383HV1.3XT.pdf
(270 pages)
Specifications of PSB21383HV1.3XT
Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
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7.2.15
Value after reset: 00
SRES
RES_xx
0: Deactivates the reset of the functional block xx
1: Activates the reset of the functional block xx
Meaning of xx:
7.3
7.3.1
Value after reset: See table below
CDAxy
Data register CDAxy which can be accessed from the controller.
Register
CDA10
CDA11
CDA20
CDA21
Data Sheet
CPLL: Codec PLL
MON:
HDLC: HDLC controller,
IOM:
TR:
CO:
The reset state is activated as long as the bit is set to ’1’
SRES - Software Reset Register
Monitorhandler
IOM Handler,
Transceiver,
Codec
IOM-2 and MONITOR Handler
CDAxy - Controller Data Access Register xy
Value after Reset
FF
FF
FF
FF
7
7
0
H
H
H
H
... Reset_xx
H
0
Controller Data Access Register
RES_
CPLL
Register Address
40
41
42
43
H
H
H
H
RES_
MON
209
HDLC
RES_
RES_
IOM
Detailed Register Description
RES_
TR
0
0
RES_
CO
PSB 21381/2
PSB 21383/4
2001-03-12
WR (3F
(40
RD/WR
H
-43
H
H
)
)
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