PSB21383HV1.3XT Infineon Technologies, PSB21383HV1.3XT Datasheet - Page 37
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PSB21383HV1.3XT
Manufacturer Part Number
PSB21383HV1.3XT
Description
Manufacturer
Infineon Technologies
Datasheet
1.PSB21383HV1.3XT.pdf
(270 pages)
Specifications of PSB21383HV1.3XT
Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
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Table 4 (cont’d)
Header Byte Code
Header 00
This programming sequence is compatible to the SOP, COP and XOP command
sequences of the ARCOFI. It gives indirect access to the codec registers 60
the CRAM (80
number of data bytes (data n; n = 0, 1, 4 or 8). The number of data bytes depends on the
codec command word. The commands can be applied in any order and number. The
coding of the different SOP, COP and XOP commands is listed in the description of the
command word (CMDW) in chapter 4.8.
Structure of the ARCOFI compatible sequence:
Header 40
The non-interleaved A-D-A-D sequences give direct read/write access to the address
range 00
can have any length. In this mode SDX and SDR can be connected together allowing
data transmission on one line.
Example for a read/write access with header 40
Data Sheet
SDR
SDX
4A
4E
43
41
49
H
H
H
00
H
H
H
H
header
-6F
Adr-Data-Data-Data
H
H
: ARCOFI Compatible Sequence
, 44
cmdw
H
(header 40
H
H
-FF
: Non-interleaved A-D-A-D Sequences
wradr
data n
H
). The codec command word (cmdw) is followed by a defined
defined length
wrdata
H
) or the CRAM range 80
Read-/Write-only
(address autoincrement) CRAM (80
Read-/Write-only
non-interleaved
interleaved
data 1
rdadr
cmd
27
rddata
H
data n
or 44
H
rdadr
-FF
defined length
H
H
:
(header 44
Address Range 00
Address Range 00
rdata
data 1
H
wradr
) respectively and
H
-FF
PSB 21381/2
PSB 21383/4
H
)
Interfaces
wrdata
2001-03-12
H
H
H
-6F
-6F
-6F
H
H
H
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