PEB2096HV31XT Lantiq, PEB2096HV31XT Datasheet - Page 29

PEB2096HV31XT

Manufacturer Part Number
PEB2096HV31XT
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEB2096HV31XT

Control Interface
HDLC
Lead Free Status / Rohs Status
Supplier Unconfirmed
3
3.1
All procedures required for data transmission over the U
These comprise the U
deactivation procedure, and timing requirements such as bit rate and jitter.
The internal finite state machine of the PEB 2096, OCTAT-P, controls the activation/
deactivation procedures, switching of loops and transmission of special pulse patterns.
Such actions can be initiated by signals on the U
control (C/I) codes sent over the IOM interface. Refer to Figure 3-8.
The exchange of control information in the C/I channel is state oriented. This means that
a code in the C/I channel is repeated in every IOM frame until a change is necessary. A
new code must be found in two consecutive IOM frames to be considered valid (double
last look criterion).
The monitor channel is used to convey message oriented information. This means that
an information in the monitor channel is transferred once, and the receiver stores that
message. In order to ensure safe data transfer, a handshake procedure between monitor
channel transmitter and receiver is necessary. An example show Figure 3-6 and Figure
3-7.
For details refer to the IOM-2 Interface Specification, Rev. 2.
3.2
At power up, a reset pulse (RST) should be applied to force the line interfaces of the
PEB 2096, OCTAT-P, to the state “reset”. No clocks are required during that procedure.
The pin SSYNC must be set to
After that the line interfaces of the PEB 2096, OCTAT-P, may be operated according to
the state diagram (Figure 3-8), each controlled via the corresponding C/I channel.
3.3
Push-pull configuration is possible also in the modes > 2.048 Mbit/s (> 8 IOM channels).
In IOM channels, which are not used by the OCTAT-P, the data upstream direction (DU)
line is in high impedance state (tristate)
3.4
The OCTAT-P supports configurations where multiple ICs are connected to the IOM-2
interface. If the MODE pin is connected to
an external pull-up resistor is connected to pin DU or not. If no resistor is detected the
pin DU is changed to push-pull. If a resistor is detected the pin DU is changed to open
Data Sheet
Operational Description
General
Clocking, Reset and Initialization
Tristate Capability on IOM-2 Interface
Push – Pull Sensing on Pin DU
PN
interface frame and multiframe synchronization, activation/
V
DD
if not used.
V
3-1
DD
the OCTAT-P senses after reset whether
PN
transmission line (INFO’s) or by
PN
interface are implemented.
Operational Description
PEB 2096
04.99

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