PEB2096HV31XT Lantiq, PEB2096HV31XT Datasheet - Page 32

• Manufacturer Part Number: PEB2096HV31XT
• Manufacturer: Lantiq

Specifications of PEB2096HV31XT

• Control Interface: HDLC
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Data Sheet
3.6.2
A zero pulse on the SSYNC input forces the OCTAT-P to start a multiframe with a code
violation in the next M-bit. Refer to Figure 3-3.
•
Figure 3-3
While using SSYNC for U
allowed. If the bit SYNEN is set (Configuration Register, bit 7) the zero pulse on SSYNC
forces the OCTAT-P also to set the T bit to ’1’ in the next U
SSYNC input must be connected to
Note: Before using SSYNC if the bit SYNEN is set, the T-bit must be set to ’0’ by the C/
I command AI.
n = number of U
Synchronization using SSYNC (for DECT)
Synchronization with SSYNC
pn
frames.
PN
multiframe synchronization the short FSC signal is not
V
DD
.
3-4
Operational Description
PN
frame. If not used the
PEB 2096
04.99