PEB2096HV31XT Lantiq, PEB2096HV31XT Datasheet - Page 43

• Manufacturer Part Number: PEB2096HV31XT
• Manufacturer: Lantiq

Specifications of PEB2096HV31XT

• Control Interface: HDLC
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Unconditional States
Reset
This state is entered unconditionally after a high appears on the RST pin or after the
receipt of command RES (software reset). The analog section is disabled (transmission
of INFO 0) and the U
or TE is not possible.
Test Mode
The test signal (it
which originally invoked the state. TM2 causes single alternating pulses to be
transmitted (it
burst mode technique normally employed on the U interface is suspended in this state
and the test signals are transmitted continuously.
Pending Deactivation
To access any of the conditional states from any of the above unconditional states the
pending deactivation state must be entered. This occurs after the receipt of a DR
command. In this state the awake detector is activated and the state is exited only when
the line has settled (i.e. INFO 0 has been detected for 2 ms) or by the command DC.
Note: Although DR is shown as a normal command it can in fact be seen as an
Conditional States
Wait for DR
This state is entered from the pending deactivation state once INFO 0 or DC has been
identified. From here the line may be either activated, deactivated or a test loop may be
entered.
Deactivated
This is the power down state of the physical protocol. The awake detection is active and
the device will respond to an INFO 1w (wake signal) by initiating activation.
Data Sheet
unconditional command. No matter which state the LT is in, the reception of a DR
command will always result in the pending deactivation state being entered.
2
); TM1 causes continuous alternating pulses to be transmitted (it
i
), sent to the U
PN
interface awake detector is inactive. Hence, activation from PT
PN
interface in this state is dependant on the command
3-15
Operational Description
PEB 2096
1
). The
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