PEB2096HV31XT Lantiq, PEB2096HV31XT Datasheet - Page 46

PEB2096HV31XT

Manufacturer Part Number
PEB2096HV31XT
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEB2096HV31XT

Control Interface
HDLC
Lead Free Status / Rohs Status
Supplier Unconfirmed
Data Sheet
3.10.3
An activation and deactivation procedure between an OCTAT-P and an IBC or
ISAC-P TE in TE mode over the U
how the state machines of the respective modes interwork to facilitate activation and
deactivation. In this case activation was initiated by an AR request at the terminal side
and deactivation by a DR command at the LT side. Activation could also be initialized at
the LT side using an AR request.
Figure 3-9
Note: T1:
T2:
T3:
T4:
Example of Activation and Deactivation
< 250 s
< 10 ms
Deactivation
Example for an ISAC
1 ms
2 ms
time for error free level detection
time for synchronization
four subsequent bursts with no CV in F bit
time for error free detection of INFO 0
TE
T1
T2
T3
PN
®
-P TE <---> OCTAT-P Activation and
interface line is shown in Figure 3-3. It illustrates
INFO 1w
INFO 0
INFO 2
INFO 0
INFO 4
INFO 3
INFO 0
INFO 0
INFO 1
3-18
T1
T2
T3
T4
LT
ITD04468
Operational Description
AR
DI
UAI
AI
DR
PEB 2096
04.99

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