PEB2096HV31XT Lantiq, PEB2096HV31XT Datasheet - Page 65

PEB2096HV31XT

Manufacturer Part Number
PEB2096HV31XT
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEB2096HV31XT

Control Interface
HDLC
Lead Free Status / Rohs Status
Supplier Unconfirmed
PEB 2096
Electrical Characteristics
5.9
Transceiver Characteristics
A detailed transceiver architecture is shown in Figure 5-12. It comprises the transmitter
output stages, the differential-to-single ended receiver input stage, the loop switch, the
peak detector, and the threshold comparators.
Figure 5-12 Detailed Transceiver Architecture
When transmitting a binary ONE, the transmitter output is 5 V (difference between LIna
and LInb), when transmitting a binary ZERO, the transmitter output is in tristate.
The receiver input range is from
5 V to
150 mV.
The 150 mV level is a fixed minimum peak level.
Data Sheet
5-14
04.99

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