PEB2096HV31XT Lantiq, PEB2096HV31XT Datasheet - Page 61
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PEB2096HV31XT
Manufacturer Part Number
PEB2096HV31XT
Description
Manufacturer
Lantiq
Datasheet
1.PEB2096HV31XT.pdf
(67 pages)
Specifications of PEB2096HV31XT
Control Interface
HDLC
Lead Free Status / Rohs Status
Supplier Unconfirmed
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Parameter
Test clock period
Test clock period low
Test clock period high
TMS setup time to TCK
TMS hold time from TCK
TDI setup time to TCK
TDI hold time from TCK
TDO valid delay from TCK
•
Figure 5-8
Note: A low at SSYNC input sets the U
5.7
•
Data Sheet
T-bit to high if SYNEN is programmed to high.
Boundary Scan Timing
SSYNC Timing
Symbol
t
t
t
t
t
t
t
t
TCP
TCPL
TCPH
MSS
MSH
DIS
DIH
DOD
PN
5-10
superframe and forces the next transmitted
min.
160
80
80
30
30
10
30
Limit Values
Electrical Characteristics
max.
70
Unit
ns
ns
ns
ns
ns
ns
ns
ns
PEB 2096
04.99
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