N25Q064A13EF640F Micron Technology Inc, N25Q064A13EF640F Datasheet - Page 105

• Manufacturer Part Number: N25Q064A13EF640F
• Manufacturer: Micron Technology Inc

Specifications of N25Q064A13EF640F

• Lead Free Status / Rohs Status: Supplier Unconfirmed

N25Q064 - 3 V
9.3.2
Note:
DQ0
Any Multiple Input/Output Read Identification (MIORDID) instruction while an Erase or
Program cycle is in progress, is not decoded, and has no effect on the cycle that is in
progress.
The device is first selected by driving Chip Select (S) Low. Then, the 8-bit instruction code
for the instruction is shifted in parallel on the 4 pins DQ0, DQ1, DQ2 and DQ3. After this, the
24-bit device identification, stored in the memory, will be shifted out on again in parallel on
DQ0, DQ1, DQ2 and DQ3. The identification bits are shifted out 4 at a time during the falling
edge of Serial Clock (C).
The Read Identification (RDID) instruction is terminated by driving Chip Select (S) High at
any time during data output.
When Chip Select (S) is driven High, the device is put in the Standby Power mode. Once in
the Standby Power mode, the device waits to be selected, so that it can receive, decode and
execute instructions.
Figure 70. Multiple I/O Read Identification instruction and data-out sequence QIO-
DQ3
Read Serial Flash Discovery Parameter
The Read Serial Flash Discovery Parameter (RDSFDP) instruction allows reading the Serial
Flash Discovery Parameter area (SFDP) in the QIO-SPI protocol. The instruction
functionality is exactly the same as the Read Serial Flash Discovery Parameter instruction
of the Extended SPI protocol. The only difference is that in the QIO-SPI protocol instruction
code, address and output data are all parallelized on the four pins DQ0, DQ1, DQ2 and
DQ3.
The dummy byte bits can not be parallelized: 8 clock cycles are requested to perform the
internal reading operation.
DQ1
DQ2
S
C
SPI
AFh
0
1
5
MAN.
code
4
6
7
2
1
0
2
3
3
5
4
6
7
DEV.
code
4
1
0
2
3
5
Micron Technology, Inc., reserves the right to change products or specifications without notice.
5
4
6
7
SIZE
code
6
1
0
2
3
7
8
9 10 11 12 13 14 15
©2010 Micron Technology, Inc. All rights reserved.
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