N25Q064A13EF640F Micron Technology Inc, N25Q064A13EF640F Datasheet - Page 99

• Manufacturer Part Number: N25Q064A13EF640F
• Manufacturer: Micron Technology Inc

Specifications of N25Q064A13EF640F

• Lead Free Status / Rohs Status: Supplier Unconfirmed

N25Q064 - 3 V
9.2.18
9.2.19
Read Flag Status Register
The Read Flag Status Register (RFSR) instruction allows the Flag Status Register to be
read.
Apart form the parallelizing of the instruction code and the output data on the two pins DQ0
and DQ1, the instruction functionality is exactly the same as the Read Flag Status Register
(RFSR) instruction of the Extended SPI protocol, please refer to
Status Register
Figure 62. Read Flag Status Register instruction sequence DIO-SPI
Clear Flag Status Register
The Clear Flag Status Register (CLFSR) instruction reset the error Flag Status Register bits
(Erase Error bit, Program Error bit, VPP Error bit, Protection Error bit). It is not necessary to
set the WEL bit before the Clear Flag Status Register instruction is executed. The WEL bit
will be unchanged after this command is executed.
Figure 63. Clear Flag Status Register instruction sequence DIO-SPI
DQ0
DQ1
C
S
for further details.
DQ0
DQ1
C
S
0
Instruction
1
2
0
3
Instruction
1
7
6
Micron Technology, Inc., reserves the right to change products or specifications without notice.
4
2
Flag Status Register Out
5
4
5
Byte
3
3
2
6
1
0
7
7
6
8
5
4
9 10 11
Byte
3
2
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Section 9.1.27: Read Flag
1
0
Instructions
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