N25Q064A13EF640F Micron Technology Inc, N25Q064A13EF640F Datasheet - Page 114

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N25Q064A13EF640F

Manufacturer Part Number
N25Q064A13EF640F
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of N25Q064A13EF640F

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Instructions
9.3.11
9.3.12
114/150
Figure 83. Sector Erase instruction sequence QIO-SPI
Bulk Erase (BE)
The Bulk Erase (BE) instruction sets all bits to '1' (FFh). Before it can be accepted, a Write
Enable (WREN) instruction must previously have been executed.
Apart form parallelizing the instruction code on the four pins DQ0, DQ1, DQ2 and DQ3, the
instruction functionality is exactly the same as the Bulk Erase (BE) instruction of the
Extended SPI protocol, please refer to
Figure 84. Bulk Erase instruction sequence QIO-SPI
Program/Erase Suspend
The Program/Erase Suspend instruction allows the controller to interrupt a Program or an
Erase instruction, in particular: Sector Erase and Quad Command Page Program can be
DQ0
DQ2
DQ3
*Address bit A23 is “Don’t Care. ”
DQ1
C
S
S
C
DQ3
DQ2
DQ1
DQ0
Instruction
0
1
2
21 17 13 9
20 16 12 8
22 18 14 10
23 19 15 11
24-Bit Address*
3
Section 9.1.20: Bulk Erase (BE)
Instruction
0
Micron Technology, Inc., reserves the right to change products or specifications without notice.
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©2010 Micron Technology, Inc. All rights reserved.
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N25Q064 - 3 V

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