ADDS-BF533-EZLITE Analog Devices Inc, ADDS-BF533-EZLITE Datasheet - Page 2

• Manufacturer Part Number: ADDS-BF533-EZLITE
• Manufacturer: Analog Devices Inc

Specifications of ADDS-BF533-EZLITE

• Significant Other Parts: ADV7183 Video Decode
• Lead Free Status / Rohs Status: Not Compliant

ADSP-BF531/ADSP-BF532/ADSP-BF533
TABLE OF CONTENTS
General Description ................................................. 3
Pin Descriptions .................................................... 18
Specifications ........................................................ 21
Portable Low Power Architecture ............................. 3
System Integration ................................................ 3
ADSP-BF531/ADSP-BF532/ADSP-BF533 Processor
Blackfin Processor Core .......................................... 4
Memory Architecture ............................................ 4
DMA Controllers .................................................. 8
Real-Time Clock ................................................... 8
Watchdog Timer .................................................. 9
Timers ............................................................... 9
Serial Ports (SPORTs) ............................................ 9
Serial Peripheral Interface (SPI) Port ....................... 10
UART Port ........................................................ 10
General-Purpose I/O Port F ................................... 10
Parallel Peripheral Interface ................................... 11
Dynamic Power Management ................................ 11
Voltage Regulation .............................................. 13
Clock Signals ..................................................... 13
Booting Modes ................................................... 14
Instruction Set Description ................................... 15
Development Tools ............................................. 15
Designing an Emulator-Compatible Processor Board .. 16
Related Documents ............................................. 17
Operating Conditions .......................................... 21
Electrical Characteristics ....................................... 22
Absolute Maximum Ratings .................................. 23
Package Information ........................................... 23
ESD Sensitivity ................................................... 23
Timing Specifications .......................................... 24
Peripherals ....................................................... 3
Clock and Reset Timing .................................... 25
Asynchronous Memory Read Cycle Timing ........... 26
Asynchronous Memory Write Cycle Timing .......... 27
SDRAM Interface Timing .................................. 28
External Port Bus Request and Grant Cycle Timing .. 29
Parallel Peripheral Interface Timing ..................... 30
Serial Ports ..................................................... 34
Serial Peripheral Interface (SPI) Port
—Master Timing .......................................... 37
Rev. E | Page 2 of 60 | July 2007
160-Ball BGA Ball Assignment .................................. 49
169-Ball PBGA ball assignment .................................. 52
176-Lead LQFP Pinout ............................................ 55
Outline Dimensions ................................................ 57
Ordering Guide ..................................................... 59
REVISION HISTORY
7/07—Revision E: Changed from Rev. D to Rev. E
Combined ADSP-BF531/532 Rev D and ADSP-BF533 Rev D
Data sheets into this Revision E ..................................
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8/06—Revision D: Changed from Rev. C to Rev. D
Output Drive Currents ......................................... 43
Power Dissipation ............................................... 45
Test Conditions .................................................. 45
Environmental Conditions .................................... 48
Surface Mount Design .......................................... 58
Serial Peripheral Interface (SPI) Port
Universal Asynchronous Receiver-Transmitter
General-Purpose I/O Port F Pin Cycle Timing ......... 40
Timer Cycle Timing .......................................... 41
JTAG Test and Emulation Port Timing .................. 42
—Slave Timing ............................................. 38
(UART) Port—Receive and Transmit Timing ...... 39
General-Purpose I/O Port F ........................... 10
Parallel Peripheral Interface ........................... 11
Dynamic Power Management ........................ 11
Voltage Regulation ...................................... 13
Clock Signals ............................................. 13
Booting Modes ........................................... 14
EZ-KIT Lite Evaluation Board ........................ 16
Features .................................................... 1
Operating Conditions ................................. 21
Electrical Characteristics .............................. 22
Serial Ports ............................................... 34
Ordering Guide ......................................... 59
Processor Comparison ............................. 3
Pin Descriptions .................................... 18
Timing Specifications ............................. 24
Parallel Peripheral Interface Timing ..... 30
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