AT32UC3A4128 Atmel Corporation, AT32UC3A4128 Datasheet - Page 816

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AT32UC3A4128

Manufacturer Part Number
AT32UC3A4128
Description
Manufacturer
Atmel Corporation

Specifications of AT32UC3A4128

Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
Hardware Qtouch Acquisition
No
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
2
Uart
4
Sd / Emmc
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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30.4
Table 30-1.
1.
30.5
30.5.1
30.5.2
30.5.3
30.5.4
30.6
30.6.1
32072G–11/2011
Pin Name
CMD[1:0]
CLK
DATA[7:0]
DATA[15:8]
I/O Lines Description
PP: Push/Pull, OD: Open Drain
Product Dependencies
Functional Description
Power Management
I/O Lines
Clocks
Interrupt
Bus Topology
I/O Lines Description
In order to use this module, other parts of the system must be configured correctly, as described
below.
If the CPU enters a sleep mode that disables clocks used by the MCI, the MCI will stop function-
ing and resume operation after the system wakes up from sleep mode.
The pins used for interfacing the MultiMedia Cards or SD Cards may be multiplexed with GPIO
lines. User must first program the I/O controller to assign the peripheral functions to MCI pins.
The clock for the MCI bus interface (CLK_MCI) is generated by the Power Manager. This clock
is enabled at reset, and can be disabled in the Power Manager. It is recommended to disable the
MCI before disabling the clock, to avoid freezing the MCI in an undefined state.
The MCI interrupt request line is connected to the interrupt controller. Using the MCI interrupt
requires the interrupt controller to be programmed first.
Figure 30-3. Multimedia Memory Card Bus Topology
Pin Description
Command/Response
Clock
Data 0..7 of Slot A
Data 0..7 of Slot B
Type
Input/Output/
PP/OD
Input/Output
Input/Output/PP
Input/Output/PP
(1)
910
1 2 3 4 5 6
MMC
1213 8
Comments
CMD of a MMC or SDCard/SDIO
CLK of a MMC or SD Card/SDIO
DAT[0..7] of a MMC
DAT[0..3] of a SD Card/SDIO
DAT[0..7] of a MMC
DAT[0..3] of a SD Card/SDIO
7
816

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