ATxmega256A3U Atmel Corporation, ATxmega256A3U Datasheet - Page 500

• Manufacturer Part Number: ATxmega256A3U
• Manufacturer: Atmel Corporation

Specifications of ATxmega256A3U

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 50
• Ext Interrupts: 50
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 10
• Twi (i2c): 2
• Uart: 7
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 16
• Eeprom (bytes): 4096
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 7
• Output Compare Channels: 22
• Input Capture Channels: 22
• Pwm Channels: 22
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

8331A–AVR–07/11
22 SPI – Serial Peripheral Interface ......................................................... 284
23 USART ................................................................................................... 290
24 IRCOM - IR Communication Module .................................................. 312
21.13
21.14
22.1
22.2
22.3
22.4
22.5
22.6
22.7
22.8
22.9
23.1
23.2
23.3
23.4
23.5
23.6
23.7
23.8
23.9
23.10
23.11
23.12
23.13
23.14
23.15
23.16
23.17
24.1
24.2
24.3
24.4
Register Summary - TWI Slave .....................................................................283
Interrupt Vector Summary .............................................................................283
Features ........................................................................................................284
Overview ........................................................................................................284
Master Mode ..................................................................................................285
Slave Mode ....................................................................................................285
Data Modes ...................................................................................................286
DMA Support .................................................................................................286
Register Description ......................................................................................287
Register Summary .........................................................................................289
Interrupt vector Summary ..............................................................................289
Features ........................................................................................................290
Overview ........................................................................................................290
Clock Generation ...........................................................................................292
Frame Formats ..............................................................................................295
USART Initialization .......................................................................................296
Data Transmission - The USART Transmitter ...............................................296
Data Reception - The USART Receiver ........................................................297
Asynchronous Data Reception ......................................................................298
Fractional Baud Rate Generation ..................................................................301
USART in Master SPI Mode ..........................................................................302
USART SPI vs. SPI .......................................................................................302
Multiprocessor Communication Mode ...........................................................303
IRCOM Mode of Operation ............................................................................303
DMA Support .................................................................................................304
Register Description ......................................................................................305
Register Summary .........................................................................................311
Interrupt Vector Summary .............................................................................311
Features ........................................................................................................312
Overview ........................................................................................................312
Registers Description ....................................................................................314
Register Summary .........................................................................................315
Atmel AVR XMEGA AU
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