LPC2926_27_29 NXP Semiconductors, LPC2926_27_29 Datasheet - Page 51

• Manufacturer Part Number: LPC2926_27_29
• Description: The LPC2926/2927/2929 combine an ARM968E-S CPU core with two integrated TCMblocks operating at frequencies of up to 125 MHz, Full-speed USB 2
• Manufacturer: NXP Semiconductors

NXP Semiconductors
LPC2926_27_29
Product data sheet
Fig 12. Block diagram of the CGU0 (see
CLOCK GENERATION UNIT (CGU0)
400 kHz LP_OSC
OSCILLATOR
EXTERNAL
FREQUENCY
MONITOR
There are two primary clock generators: a low-power ring oscillator (LP_OSC) and a
crystal oscillator. See
LP_OSC is the source for the BASE_PCR_CLK that clocks the CGU0 itself and for
BASE_SAFE_CLK that clocks a minimum of other logic in the device (like the watchdog
timer). To prevent the device from losing its clock source LP_OSC cannot be put into
power-down. The crystal oscillator can be used as source for high-frequency clocks or as
an external clock input if a crystal is not connected.
Secondary clock generators are a PLL and seven fractional dividers (FDIV[0:6]). The PLL
has three clock outputs: normal, 120° phase-shifted and 240° phase-shifted.
PLL
clkout
clkout120
clkout240
DETECTION
CLOCK
All information provided in this document is subject to legal disclaimers.
Table 27
Rev. 5 — 28 September 2010
Figure
AHB TO DTL BRIDGE
for all base clocks)
12.
FDIV0
FDIV1
FDIV6
ARM9 microcontroller with CAN, LIN, and USB
LPC2926/2927/2929
OUT 0
OUT 1
OUT 2
OUT 3
OUT 11
002aae147
© NXP B.V. 2010. All rights reserved.
BASE_SAFE_CLK
BASE_SYS_CLK
BASE_PCR_CLK
BASE_IVNSS_CLK
BASE_ICLK1_CLK
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