LPC2926_27_29 NXP Semiconductors, LPC2926_27_29 Datasheet - Page 59

• Manufacturer Part Number: LPC2926_27_29
• Description: The LPC2926/2927/2929 combine an ARM968E-S CPU core with two integrated TCMblocks operating at frequencies of up to 125 MHz, Full-speed USB 2
• Manufacturer: NXP Semiconductors

NXP Semiconductors
LPC2926_27_29
Product data sheet
6.17 Vectored Interrupt Controller (VIC)
Table 32.
Legend:
‘1’ Indicates that the related register bit is tied off to logic HIGH, all writes are ignored
‘0’ Indicates that the related register bit is tied off to logic LOW, all writes are ignored
‘+’ Indicates that the related register bit is readable and writable
The LPC2926/2927/2929 contains a very flexible and powerful Vectored Interrupt
Controller to interrupt the ARM processor on request.
The key features are:
Branch clock name
CLK_MSCSS_ADC2_APB BASE_MSCSS_CLK
CLK_MSCSS_QEI
CLK_OUT_CLK
CLK_UART0
CLK_UART1
CLK_SPI0
CLK_SPI1
CLK_SPI2
CLK_TMR0
CLK_TMR1
CLK_TMR2
CLK_TMR3
CLK_ADC0
CLK_ADC1
CLK_ADC2
CLK_USB_I2C
CLK_USB
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Level-active interrupt request with programmable polarity.
56 interrupt request inputs.
Software interrupt request capability associated with each request input.
Interrupt request state can be observed before masking.
Software-programmable priority assignments to interrupt requests up to 15 levels.
Software-programmable routing of interrupt requests towards the ARM-processor
inputs IRQ and FIQ.
Fast identification of interrupt requests through vector.
Support for nesting of interrupt service routines.
Branch clock overview
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 28 September 2010
Base clock
BASE_OUT_CLK
BASE_UART_CLK
BASE_UART_CLK
BASE_TMR_CLK
BASE_TMR_CLK
BASE_TMR_CLK
BASE_TMR_CLK
BASE_ADC_CLK
BASE_ADC_CLK
BASE_ADC_CLK
BASE_USB_I2C_CLK
BASE_USB_CLK
BASE_MSCSS_CLK
BASE_SPI_CLK
BASE_SPI_CLK
BASE_SPI_CLK
…continued
ARM9 microcontroller with CAN, LIN, and USB
LPC2926/2927/2929
Implemented switch on/off
mechanism
WAKE-UP
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AUTO
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© NXP B.V. 2010. All rights reserved.
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RUN
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