ST72321AR6-Auto STMicroelectronics, ST72321AR6-Auto Datasheet - Page 129

• Manufacturer Part Number: ST72321AR6-Auto
• Description: 8-bit MCU for automotive with 32 Kbyte Flash, 10-bit ADC, timers, SPI, SCI and I2C interfaces
• Manufacturer: STMicroelectronics

Specifications of ST72321AR6-Auto

• Hdflash Endurance: 100 cycles, data retention 20 years
• Clock Sources: crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
• 4 Power Saving Modes: Halt, Active Halt, Wait and Slow

ST72321xx-Auto
14.5.4
Note:
Figure 60. Clearing the WCOL bit (Write Collision Flag) software sequence
Single master systems
A typical single master system may be configured, using an MCU as the master and four
MCUs as slaves (see
The master device selects the individual slave devices by using four pins of a parallel port to
control the four SS pins of the slave devices.
The SS pins are pulled high during reset since the master device ports will be forced to be
inputs at that time, thus disabling the slave devices.
To prevent a bus conflict on the MISO line the master allows only one active slave device
during a transmission.
For more security, the slave device may respond to the master with the received data byte.
Then the master will receive the previous byte back from the slave device if all MISO and
MOSI pins are connected and the slave has not written to its SPIDR register.
Other transmission security methods can use ports for handshake lines or data bytes with
command fields.
Figure 61. Single master / multiple slave configuration
Clearing sequence after SPIF = 1 (end of a data byte transfer)
1st Step
2nd Step
Clearing sequence before SPIF = 1 (during a data byte transfer)
1st Step
2nd Step
5V
Read SPICSR
MOSI
Read SPIDR
MOSI
SCK
SS
SCK
MCU
Master
Slave
MCU
MISO
MISO
SS
Figure
RESULT
SPIF = 0
WCOL = 0
61).
Read SPICSR
Read SPIDR
Doc ID 13829 Rev 1
MOSI
SCK
Slave
MCU
MISO
SS
RESULT
WCOL = 0
MOSI
SCK
Slave
MCU
Serial peripheral interface (SPI)
MISO
SS
Note: Writing to the SPIDR register
instead of reading it does not reset the
WCOL bit.
MOSI
SCK
Slave
MCU
MISO
SS
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