ST72321AR6-Auto STMicroelectronics, ST72321AR6-Auto Datasheet - Page 145

• Manufacturer Part Number: ST72321AR6-Auto
• Description: 8-bit MCU for automotive with 32 Kbyte Flash, 10-bit ADC, timers, SPI, SCI and I2C interfaces
• Manufacturer: STMicroelectronics

Specifications of ST72321AR6-Auto

• Hdflash Endurance: 100 cycles, data retention 20 years
• Clock Sources: crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
• 4 Power Saving Modes: Halt, Active Halt, Wait and Slow

ST72321xx-Auto
Note:
Consequently, the bit length must be long enough so that the 8th, 9th and 10th samples
have the desired bit value. This means the clock frequency should not vary more than 6/16
(37.5%) within one bit. The sampling clock is resynchronized at each start bit, so that when
receiving 10 bits (one start bit, 1 data byte, 1 stop bit), the clock deviation must not exceed
3.75%.
The internal sampling clock of the microcontroller samples the pin value on every falling
edge. Therefore, the internal sampling clock and the time the application expects the
sampling to take place may be out of sync. For example: If the baud rate is 15.625 Kbaud
(bit length is 64µs), then the 8th, 9th and 10th samples are at 28µs, 32µs and 36µs
respectively (the first sample starting ideally at 0µs). But if the falling edge of the internal
clock occurs just before the pin value changes, the samples would then be out of sync by
~4us. This means the entire bit length must be at least 40µs (36µs for the 10th sample + 4µs
for synchronization with the internal sampling clock).
Clock deviation causes
The causes which contribute to the total deviation are:
All the deviations of the system should be added and compared to the SCI clock tolerance:
Noise error causes
See also description of noise error in
Start bit
The noise flag (NF) is set during start bit reception if one of the following conditions occurs:
1.
2.
Therefore, a valid Start Bit must satisfy both the above conditions to prevent the Noise Flag
getting set.
Data bits
The noise flag (NF) is set during normal data bit reception if the following condition occurs:
●
Therefore, a valid Data Bit must have samples 8, 9 and 10 at the same value to prevent the
Noise Flag from getting set.
–
–
–
–
A valid falling edge is not detected. A falling edge is considered to be valid if the 3
consecutive samples before the falling edge occurs are detected as ‘1’ and, after the
falling edge occurs, during the sampling of the 16 samples, if one of the samples
numbered 3, 5 or 7 is detected as a ‘1’.
During sampling of the 16 samples, if one of the samples numbered 8, 9 or 10 is
detected as a ‘1’.
During the sampling of 16 samples, if all three samples numbered 8, 9 and10 are not
the same. The majority of the 8th, 9th and 10th samples is considered as the bit value.
D
the transmitter is transmitting at a different baud rate).
D
D
during the reception of one complete SCI message assuming that the deviation
has been compensated at the beginning of the message.
D
TRA
QUANT
REC
TCL
: Deviation due to the transmission line (generally due to the transceivers)
: Deviation due to transmitter error (Local oscillator error of the transmitter or
: Deviation of the local oscillator of the receiver: This deviation can occur
: Error due to the baud rate quantization of the receiver.
D
TRA
Doc ID 13829 Rev 1
+ D
QUANT
Receiver on page
+ D
REC
+ D
Serial communications interface (SCI)
TCL
140.
< 3.75%
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