ST72321AR6-Auto STMicroelectronics, ST72321AR6-Auto Datasheet - Page 28

• Manufacturer Part Number: ST72321AR6-Auto
• Description: 8-bit MCU for automotive with 32 Kbyte Flash, 10-bit ADC, timers, SPI, SCI and I2C interfaces
• Manufacturer: STMicroelectronics

Specifications of ST72321AR6-Auto

• Hdflash Endurance: 100 cycles, data retention 20 years
• Clock Sources: crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
• 4 Power Saving Modes: Halt, Active Halt, Wait and Slow

Register and memory map
Table 4.
1. The contents of the I/O port DR registers are readable only in output configuration. In input configuration, the values of the
2. The bits associated with unavailable pins must always keep their reset value.
Note:
28/243
Address
004Ch
004Dh
007Ch
007Dh
004Ah
004Bh
004Eh
004Fh
006Fh
007Ah
007Bh
007Eh
007Fh
0040h
0041h
0042h
0043h
0044h
0045h
0046h
0047h
0048h
0049h
0050h
0051h
0052h
0053h
0054h
0055h
0056h
0057h
0058h
0070h
0071h
0072h
0073h
0074h
0075h
0076h
0077h
0078h
0079h
I/O pins are returned instead of the DR register contents.
PWM ART
TIMER B
Hardware register map (continued)
Legend: x = undefined, R/W = read/write
Block
ADC
SCI
Register label
TBCR2
TBCR1
TBCSR
TBIC1HR
TBIC1LR
TBOC1HR
TBOC1LR
TBCHR
TBCLR
TBACHR
TBACLR
TBIC2HR
TBIC2LR
TBOC2HR
TBOC2LR
SCISR
SCIDR
SCIBRR
SCICR1
SCICR2
SCIERPR
SCIETPR
ADCCSR
ADCDRH
ADCDRL
PWMDCR3
PWMDCR2
PWMDCR1
PWMDCR0
PWMCR
ARTCSR
ARTCAR
ARTARR
ARTICCSR
ARTICR1
ARTICR2
Timer B Control Register 2
Timer B Control Register 1
Timer B Control/Status Register
Timer B Input Capture 1 High Register
Timer B Input Capture 1 Low Register
Timer B Output Compare 1 High Register
Timer B Output Compare 1 Low Register
Timer B Counter High Register
Timer B Counter Low Register
Timer B Alternate Counter High Register
Timer B Alternate Counter Low Register
Timer B Input Capture 2 High Register
Timer B Input Capture 2 Low Register
Timer B Output Compare 2 High Register
Timer B Output Compare 2 Low Register
SCI Status Register
SCI Data Register
SCI Baud Rate Register
SCI Control Register 1
SCI Control Register 2
SCI Extended Receive Prescaler Register
Reserved area
SCI Extended Transmit Prescaler Register
Control/Status Register
Data High Register
Data Low Register
PWM AR Timer Duty Cycle Register 3
PWM AR Timer Duty Cycle Register 2
PWM AR Timer Duty Cycle Register 1
PWM AR Timer Duty Cycle Register 0
PWM AR Timer Control Register
Auto-Reload Timer Control/Status Register
Auto-Reload Timer Counter Access Register
Auto-Reload Timer Auto-Reload Register
AR Timer Input Capture Control/Status Reg.
AR Timer Input Capture Register 1
AR Timer Input Capture Register 1
Doc ID 13829 Rev 1
Reserved Area (24 Bytes)
Reserved Area (2 bytes)
Reserved Area (1 byte)
Register name
Reset status
xxxx x0xx b
x000 0000b
FCh
FCh
FFh
FFh
C0h
00h
00h
80h
00h
80h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
xxh
xxh
xxh
xxh
xxh
---
ST72321xx-Auto
R/W
R/W
R/W
Read Only
Read Only
R/W
R/W
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
R/W
R/W
Read Only
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Read Only
Read Only
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Read Only
Read Only
Remarks