ST72321AR6-Auto STMicroelectronics, ST72321AR6-Auto Datasheet - Page 99

• Manufacturer Part Number: ST72321AR6-Auto
• Description: 8-bit MCU for automotive with 32 Kbyte Flash, 10-bit ADC, timers, SPI, SCI and I2C interfaces
• Manufacturer: STMicroelectronics

Specifications of ST72321AR6-Auto

• Hdflash Endurance: 100 cycles, data retention 20 years
• Clock Sources: crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
• 4 Power Saving Modes: Halt, Active Halt, Wait and Slow

ST72321xx-Auto
13.3
13.3.1
Functional description
Counter
The main block of the Programmable Timer is a 16-bit free running upcounter and its
associated 16-bit registers. The 16-bit registers are made up of two 8-bit registers called
high and low.
Counter Register (CR)
●
●
Alternate Counter Register (ACR)
●
●
These two read-only 16-bit registers contain the same value but with the difference that
reading the ACLR register does not clear the TOF bit (Timer overflow flag), located in the
Status register (SR) (see note at the end of paragraph entitled
Writing in the CLR register or ACLR register resets the free running counter to the FFFCh
value.
Both counters have a reset value of FFFCh (this is the only value which is reloaded in the
16-bit timer). The reset value of both counters is also FFFCh in One Pulse mode and PWM
mode.
The timer clock depends on the clock control bits of the CR2 register, as illustrated in
Table 61: Timer clock
262144 or 524288 CPU clock cycles depending on the CC[1:0] bits.
The timer frequency can be f
Counter High Register (CHR) is the most significant byte (MS Byte)
Counter Low Register (CLR) is the least significant byte (LS Byte)
Alternate Counter High Register (ACHR) is the most significant byte (MS Byte)
Alternate Counter Low Register (ACLR) is the least significant byte (LS Byte)
selection. The value in the counter register repeats every 131072,
CPU
Doc ID 13829 Rev 1
/2, f
CPU
/4, f
CPU
/8 or an external frequency.
16-bit read
sequence).
16-bit timer
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