CM68HC05C4ACFB Motorola / Freescale Semiconductor, CM68HC05C4ACFB Datasheet - Page 22

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CM68HC05C4ACFB

Manufacturer Part Number
CM68HC05C4ACFB
Description
Microcontroller
Manufacturer
Motorola / Freescale Semiconductor
Datasheet
General Description
1.5.1 V
1.5.2 IRQ
1.5.3 OSC1 and OSC2
1.5.4 RESET
1.5.5 TCAP
1.5.6 TCMP
General Release Specification
22
DD
and V
SS
Power is supplied to the microcontroller using these two pins. V
positive supply and V
This pin has a mask selectable option that provides two different choices
of interrupt triggering sensitivity. The IRQ pin contains an internal
Schmitt trigger as part of its input to improve noise immunity. Refer to
Section 4. Interrupts
These pins provide control input for an on-chip clock oscillator circuit. A
crystal, a ceramic resonator, a resistor/capacitor combination, or an
external signal connects to these pins, providing a system clock. The
internal bus rate is one-half the external oscillator frequency.
This active low pin is used to reset the MCU to a known startup state by
pulling RESET low. The RESET pin contains an internal Schmitt trigger
as part of its input to improve noise immunity.
This pin controls the input capture feature for the on-chip programmable
timer. The TCAP pin contains an internal Schmitt trigger as part of its
input to improve noise immunity.
The TCMP pin provides an output for the output compare feature of the
on-chip timer subsystem.
General Description
for more detail.
SS
is ground.
MC68HC05C4A
MOTOROLA
DD
Rev. 4.0
is the

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