CM68HC05C4ACFB Motorola / Freescale Semiconductor, CM68HC05C4ACFB Datasheet - Page 99
CM68HC05C4ACFB
Manufacturer Part Number
CM68HC05C4ACFB
Description
Microcontroller
Manufacturer
Motorola / Freescale Semiconductor
Datasheet
1.CM68HC05C4ACFB.pdf
(156 pages)
- Current page: 99 of 156
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12.3.8 Relative
12.4 Instruction Types
MC68HC05C4A
MOTOROLA
—
Rev. 4.0
Relative addressing is only for branch instructions. If the branch
condition is true, the CPU finds the effective branch destination by
adding the signed byte following the opcode to the contents of the
program counter. If the branch condition is not true, the CPU goes to the
next instruction. The offset is a signed, two’s complement byte that gives
a branching range of –128 to +127 bytes from the address of the next
location after the branch instruction.
When using the Motorola assembler, the programmer does not need to
calculate the offset, because the assembler determines the proper offset
and verifies that it is within the span of the branch.
The MCU instructions fall into the following five categories:
•
•
•
•
•
Register/Memory instructions
Read-Modify-Write instructions
Jump/Branch instructions
Bit manipulation instructions
Control instructions
Instruction Set
General Release Specification
Instruction Types
Instruction Set
99
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