FW912 Micron Semiconductor Products, FW912 Datasheet - Page 18

• Manufacturer Part Number: FW912
• Description: Flash Memory Technology
• Manufacturer: Micron Semiconductor Products

4 Meg x 16 Async/Page/Burst Flash Memory
MT28F642D18_3.p65 – Rev. 3, Pub. 8/02
STATUS
MODE
Read (array, status registers,
device identification register, or
query)
Standby
Output Disable
Reset
Write
BIT #
SR7
SR6
SR5
SR4
SR3
SR2
SR1
SR0
WSMS
7
STATUS REGISTER BIT
WRITE STATE MACHINE STATUS (WSMS)
1 = Ready
0 = Busy
ERASE SUSPEND STATUS (ESS)
1 = BLOCK ERASE Suspended
0 = BLOCK ERASE in
ERASE/CHECK BLOCK ERASE
STATUS (ES)
1 = Error in BLOCK ERASE/
0 = Successful BLOCK ERASE
PROGRAM STATUS (PS)
1 = Error in PROGRAM
0 = Successful PROGRAM
V
1 = V
0 = V
PROGRAM SUSPEND STATUS (PSS)
1 = PROGRAM Suspended
0 = PROGRAM in Progress/Completed
BLOCK LOCK STATUS (BLS)
1 = PROGRAM/ERASE Attempted on a
0 = No Operation to Locked Blocks
RESERVED FOR FUTURE ENHANCEMENT
PP
Progress/Completed
CHECK BLOCK ERASE
STATUS (V
Locked Block; Operation Aborted
PP
PP
= OK
Low Detect, Operation Abort
ESS
6
PP
S)
ES
5
Status Register Bit Definitions
RST#
VIL
V
V
V
V
IH
IH
IH
IH
Bus Operations
PS
CE#
4
V
V
V
V
X
If a PROGRAM or ERASE operation is attempted to one of the
IH
DESCRIPTION
Check WSM bit to determine word program or block erase
completion before checking program or erase status bits.
When ERASE SUSPEND is issued, WSM halts execution and
sets both WSMS and ESS bits to “1.” ESS bit remains set to
“1” until an ERASE RESUME command is issued.
When this bit is set to “1” and ERASE CONFIRM is issued, WSM
has applied the maximum number of erase pulses to the block
and is still unable to verify successful block erasure. When this
bit is set to “1” and CHECK BLOCK ERASE CONFIRM is issued,
WSM has checked the block for its erase state, and the block is
not erased.
When this bit is set to “1,” WSM has attempted but failed to
program a word.
The V
the V
the program or erase command sequences have been entered
and informs the system if V
checked before the PROGRAM/ERASE is verified by the WSM.
When PROGRAM SUSPEND is issued, WSM halts execution
and sets both WSM and PSS bits to “1.” PSS bit remains set to
“1” until a PROGRAM RESUME command is issued.
locked blocks, this is set by the WSM. The operation specified
is aborted and the device is returned to read status mode.
This bit is reserved for future use.
IL
IL
IL
Table 7
Table 8
ASYNC/PAGE/BURST FLASH MEMORY
18
PP
PP
level. The WSM interrogates the V
ADV#
status bit does not provide continuous indication of
V
V
X
X
X
V
IL
IL
PP
3
S
Micron Technology, Inc., reserves the right to change products or specifications without notice.
OE#
V
V
V
X
X
IH
IH
IL
PSS
2
PP
< 0.9V. The V
WE#
V
V
V
X
X
IH
IH
IL
ADDRESS DQ0-DQ15
BLS
1
PP
PP
4 MEG x 16
level only after
X
X
X
X
X
level is also
©2002, Micron Technology, Inc.
ADVANCE
High-Z
High-Z
High-Z
D
D
R
0
OUT
IN