FW912 Micron Semiconductor Products, FW912 Datasheet - Page 28

• Manufacturer Part Number: FW912
• Description: Flash Memory Technology
• Manufacturer: Micron Semiconductor Products

4 Meg x 16 Async/Page/Burst Flash Memory
MT28F642D18_3.p65 – Rev. 3, Pub. 8/02
13–11
BIT #
2–0
15
14
10
9
8
7
6
5
4
3
RM
BS
15
7
DESCRIPTION
Read Mode (RM)
Reserved
Latency Counter (LC)
Wait Signal Polarity (WSP)
Hold Data Out (HDO)
Wait Configuration (WC)
Burst Sequence (BS)
Clock Configuration (CC)
Reserved
Deep Power-Down (DPD)
Burst Wrap (BW)
Burst Length (BL)
CC
14
R
6
LC2
13
R
5
Read Configuration Register
Defines the clock edge on which the BURST operation starts and
DPD
FUNCTION
0 = Synchronous Burst Access Mode
1 = Asynchronous/Page Access Mode (default)
Default = 0
Sets the number of clock cycles before valid data out:
000 = Code 0 - reserved
001 = Code 1 - reserved
010 = Code 2 - reserved
011 = Code 3
100 = Code 4
101 = Code 5
110 = Code 6 - reserved
111 = Code 7 - reserved (default)
0 = WAIT signal is active LOW
1 = WAIT signal is active HIGH (default)
Sets the data output configuration:
0 = Hold data for one clock
1 = Hold data for two clocks (default)
Controls the behavior of the WAIT# output signal:
0 = WAIT# asserted during delay
1 = WAIT# asserted one data cycle before delay (default)
Specifies the order in which data is addressed in synchronous
burst mode:
0 = Interleaved
1 = Linear (default)
data is referenced:
0 = Falling edge
1 = Rising edge (default)
Default = 0
0 = No DPD mode (default)
1 = DPD mode
0 = Burst wraps within the burst length
1 = No burst wrap (default)
Sets the number of words the device will output in burst mode:
001 = 4 words
010 = 8 words
111 = Continuous burst (default)
LC1
12
4
Table 9
ASYNC/PAGE/BURST FLASH MEMORY
28
LC0
BW
11
3
Micron Technology, Inc., reserves the right to change products or specifications without notice.
WSP
BL2
10
2
HDO
BL1
9
1
4 MEG x 16
©2002, Micron Technology, Inc.
ADVANCE
BL0
WC
8
0