FW912 Micron Semiconductor Products, FW912 Datasheet - Page 31

• Manufacturer Part Number: FW912
• Description: Flash Memory Technology
• Manufacturer: Micron Semiconductor Products

BURST WRAP
eight-word linear burst access wraps within the burst
length or whether it crosses the eight-word boundary.
In wrap mode (RCR3 = 0) the four- or eight-word access
will wrap within the four or eight words, respectively. In
no-wrap mode (RCR3 = 1), the device operates simi-
larly to a continuous burst. For example, in a four-word
burst, no-wrap mode, the possible linear burst se-
quences that do not assert WAIT# are:
word boundary: 7-8-9-10 and 15-16-17-18. In a four-
word burst, wrap mode, no WAIT# is asserted and the
possible wrap sequences are:
Refer to Table 11 for a list of acceptable sequences.
When the continuous burst option is selected, the in-
ternal address wraps to 000000h if the device is read
past the last address.
4 Meg x 16 Async/Page/Burst Flash Memory
MT28F642D18_3.p65 – Rev. 3, Pub. 8/02
WP#
The burst wrap option, RCR3, signals if a four- or an
The worst-case delay is seen at the end of the eight-
0
0
0
1
1
1
1
0-1-2-3
1-2-3-4
2-3-4-5
3-4-5-6
4-5-6-7
0-1-2-3
1-2-3-0
2-3-0-1
3-0-1-2
4-5-6-7
DQ1
0
0
1
0
0
1
1
8-9-10-11
9-10-11-12
10-11-12-13
11-12-13-14
12-13-14-15
5-6-7-4
6-7-4-5
7-4-5-6
8-9-10-11
9-10-11-8
DQ0
0
1
1
0
1
0
1
Locked (Default)
Lock Down
Lock Down
Lock Down
Unlocked
Unlocked
Disabled
Disabled
Locked
NAME
etc.
Block Locking State Transition
ERASE/PROG
ALLOWED
Table 12
ASYNC/PAGE/BURST FLASH MEMORY
Yes
Yes
Yes
No
No
No
No
31
BURST LENGTH
device outputs. The device supports a burst length of
four or eight words. The device can also be set in con-
tinuous burst mode. In this mode the device linearly
outputs data until the internal burst counter reaches
the end of the burstable address space. RCR2 sets the
burst length.
CONTINUOUS BURST LENGTH
memory may have an output delay when the burst
sequence crosses the first eight-word boundary. Also,
in four- or eight-word bursts with the burst wrap set to
no wrap (RCR3 = 1), the Flash memory may have an
output delay when the burst sequence crosses the first
eight-word boundary. The starting address dictates
whether or not a delay occurs. If the starting address is
aligned with an eight-word boundary, the delay is not
seen. For a four-word burst, if the starting address is
aligned with a four-word boundary, a delay is not seen.
If the starting address is at the end of an eight-word
boundary, the output delay is the maximum delay,
equal to the latency counter setting.
burst access. If the burst never crosses an eight-word
boundary, the WAIT# is not asserted. The activation of
WAIT# informs the system if this output delay occurs.
The burst length defines the number of words the
During continuous burst mode operation, the Flash
The delay happens only once during a continuous
No Change
No Change
No Change
No Change
Micron Technology, Inc., reserves the right to change products or specifications without notice.
To [001]
To [101]
To [111]
LOCK
No Change
No Change
No Change
No Change
UNLOCK
To [000]
To [100]
To [110]
4 MEG x 16
©2002, Micron Technology, Inc.
No Change
No Change
ADVANCE
To [011]
To [011]
To [111]
To [111]
To [111]
DOWN
LOCK