CMX980AL7 CML Microcircuits, CMX980AL7 Datasheet - Page 31
![no-image](/images/no-image-200.jpg)
CMX980AL7
Manufacturer Part Number
CMX980AL7
Description
TETRA Baseband Processor
Manufacturer
CML Microcircuits
Datasheet
1.CMX980AL7.pdf
(108 pages)
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TETRA Baseband Processor
Read operation
For these read operations to be valid, the Tx Data path must be active (TxEn bit of TxSetup Register set
active) and the SymbModuBypass bit of the ConfigCtrl1 Register must also be set active.
7:2
1:0
7:0
7:0
Bit
1999 Consumer Microcircuits Limited
UpperFIFORdData
LowerFIFORdData
Address $0x06 and $0x07
Name
Address $0x04
Address $0x05
Data
Data
Active State
R
R
R
Reserved. Bit values are not defined.
Reads address access bits 9 and 8 of the FIFO data output
register, these are placed in bits 1 and 0.
Reads address access bits 7 to 0 of the FIFO data output
register. Reading this location also performs a FIFO read
operation, thereby moving the next (if any) FIFO data
location into the FIFO data output register.
Reserved. Bit values are not defined.
31
Function
CMX980A
D/980A/3
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