CMX980AL7 CML Microcircuits, CMX980AL7 Datasheet - Page 76

• Manufacturer Part Number: CMX980AL7
• Description: TETRA Baseband Processor
• Manufacturer: CML Microcircuits

TETRA Baseband Processor
Title:
Address:
Function:
Description:
7:0
7:0
7:0
7:0
Bit
1999 Consumer Microcircuits Limited
0
0
0
0
RxDPIDataLSB
RxDPIDataMSB
RxDPQDataLSB
RxDPQDataMSB
1
1
1
1
RxDataAccess
Address field
Address field
1
1
1
1
Rx Data path Access point.
$0x38 to $0x3B (mapped over 4 locations)
RW
This register block allows direct access to the Rx Data path values just after the Rx gain and
offset adjustment block. Both read and write operations are permitted. A read operation reads
the signal values on the I and Q channels. A write operation will write data to the Rx Data path
operator output. To prevent normal Rx data overwriting this value the RxDPAccessSel bit in the
LoopBackCtrl Register should be set active. The MSB read data register is buffered to enable
access of a discrete sample value (if this register was not buffered, data from different sample
periods could be in the MSB and LSB registers). Therefore the LSB register must be read first
for correct operation.
Name
1
1
1
1
Address $0x3A
Address $0x3B
Address $0x38
Address $0x39
0
0
0
0
[6:0]
[6:0]
0
0
1
1
Data
Data
Data
Data
Active State
Address and Data format for RxDPQData access
0
1
0
1
Address and Data format for RxDPIData access
D15 D14 D13 D12 D11 D10 D9 D8
D15 D14 D13 D12 D11 D10 D9 D8
RW
RW
RW
RW
Least significant 8 bits of the RxDPIData register. This
register must be read before its associated MSB register.
Most significant 8 bits of the RxDPIData register.
Least significant 8 bits of the RxDPQData register. This
register must be read before its associated MSB register.
Most significant 8 bits of the RxDPQData register.
76
Data field [15:0]
Data field [15:0]
Function
D7 D6 D5 D4 D3 D2
D7 D6 D5 D4 D3 D2
CMX980A
D/980A/3
D1 D0
D1 D0