CMX980AL7 CML Microcircuits, CMX980AL7 Datasheet - Page 66
CMX980AL7
Manufacturer Part Number
CMX980AL7
Description
TETRA Baseband Processor
Manufacturer
CML Microcircuits
Datasheet
1.CMX980AL7.pdf
(108 pages)
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TETRA Baseband Processor
Title:
Address:
Function:
Description:
7:0
7:4
3:0
7:0
7:4
3:0
Bit
1999 Consumer Microcircuits Limited
TxIOffsetLSB
TxIOffsetMSB
TxQOffsetLSB
TxQOffsetMSB
TxIQOffset
Transmit I and Q channel Offset correction register
$0x44, $0x45, $0x4A, and $0x4B (4 locations)
RW
This register controls the Tx Data path signal offset. This offset is a 2s-complement value
(N
offset applied is at the discretion of the user. Inappropriate values may cause arithmetic
overflow in the subsequent operator sections. The result is given by the formula:
Name
offset
Address $0x4A
Address $0x4B
Address $0x44
Address $0x45
), which is applied to the Tx signal after the Gain Multiplier (G
D
out
Data
Data
Data
Data
Active State
D +
RW
RW
RW
RW
RW
RW
N
2
offset
11
Least significant 8 bits of the TxIOffset register (N
Reserved. Set these bits Low. Undefined on read.
Most significant 4 bits of the TxIOffset register (N
Least significant 8 bits of the TxQOffset register (N
Reserved. Set these bits Low. Undefined on read.
Most significant 4 bits of the TxQOffset register (N
66
Where:
D
N
out
offset
Function
is the signal input,
is the signal output,
is the signed 2s-complement
value in the register.
val
), but before the DAC. The
offset
offset
offset
offset
CMX980A
).
D/980A/3
).
).
).
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