CMX980AL7 CML Microcircuits, CMX980AL7 Datasheet - Page 39
![no-image](/images/no-image-200.jpg)
CMX980AL7
Manufacturer Part Number
CMX980AL7
Description
TETRA Baseband Processor
Manufacturer
CML Microcircuits
Datasheet
1.CMX980AL7.pdf
(108 pages)
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TETRA Baseband Processor
Title:
Address:
Function:
Description:
7:2
1:0
7:0
7:2
1:0
7:0
7:2
1:0
7:2
7:2
1:0
Bit
1999 Consumer Microcircuits Limited
Adc1LsbData
Adc1MsbData
Adc2LsbData
Adc2MsbData
Adc3LsbData
Adc3MsbData
Adc4LsbData
AuxAdcData
Auxiliary ADC Data registers
(Eight registers) $0x10 to $0x17
R
These registers enable the user to inspect the conversion value for each of the four auxiliary
ADCs. There are two read registers per ADC, one to obtain the least significant two bits of the
data, the other for the most significant eight bits. Reading these registers does not affect the
ADC conversion cycle. Reading the MSB read register directly reads the ADC output and
simultaneously causes the two bits in the LSB read register to be written into a holding register.
This holding register is read when the LSB read register is read. This mechanism is necessary
to allow the user to read MSB and LSB data from the same ADC conversion cycle. If only the
MSB read register is read, the converter can be considered as an 8-bit ADC. If a 10-bit
conversion is required, the MSB read register must be read first.
Name
Address $0x10
Address $0x11
Address $0x12
Address $0x13
Address $0x14
Address $0x15
Address $0x16
Data
Data
Data
Data
Data
Data
Data
Active State
R
R
R
R
R
R
R
R
R
R
R
Reserved. Bit Values are not defined
Least significant two bits of the data from the last
conversion of AuxAdc1.
Most significant eight bits of the data from the last
conversion of the AuxAdc1.
Reserved. Bit values are not defined.
Least significant two bits of the data from the last
conversion of the AuxAdc2.
Most significant eight bits of the data from the last
conversion of the AuxAdc2.
Reserved. Bit values are not defined.
Least significant two bits of the data from the last
conversion of AuxAdc3.
Most significant eight bits of the data from the last
conversion of the AuxAdc3.
Reserved. Bit values are not defined.
Least significant two bits of the data from the last
conversion of the AuxAdc4.
39
Function
CMX980A
D/980A/3
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