CMX980AL7 CML Microcircuits, CMX980AL7 Datasheet - Page 96
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CMX980AL7
Manufacturer Part Number
CMX980AL7
Description
TETRA Baseband Processor
Manufacturer
CML Microcircuits
Datasheet
1.CMX980AL7.pdf
(108 pages)
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TETRA Baseband Processor
Tx Notes:
General Points:
TETRA Specific Parameters (continued)
Adjacent Channel Power during ramping over
5 symbols at 25kHz frequency offset
Vector Error (peak)
1999 Consumer Microcircuits Limited
Linear Ramping
Sigmoidal Ramping
1. Measured with an MCLK/4096 test signal in MCLK/1024 bandwidth
2. Peak to peak, differential at maximum gain
3. Power measured through an MCLK/460 filter centred at the stated frequency offset, relative to
4. Power measured through an ideal RRC filter ( = 0.35) centred at the stated frequency offset,
5. Vector errors are measured with ideal IF and RF sections, after gain and offset adjustment,
6. All parameters refer to the entire Tx baseband I and Q channels, with recommended external
7. A gain multiplier function allows independent proportional control of each channel.
8. Offset adjustment for each channel is available by loading a 12-bit word into the transmit
power measured through an MCLK/460 filter centred on the main channel, with Tx gain set to
$0x5A7 (-3dB below maximum).
relative to power measured through an ideal RRC filter (
channel, with Tx gain set to $0x5A7 (-3dB below maximum).
and specified as a fraction of the nominal vector value.
components and default filter coefficients, unless otherwise indicated.
multiplier is a 12-bit word for each channel, input via the serial interface, representing a value
from 0 to 1. This multiplication is applied to the signals from the FIR filters.
offset register via the serial interface.
Parameter
96
Notes
5
Min.
0.045
Typ.
-55
-60
= 0.35) centred on the main
Max.
0.07
-53
-57
CMX980A
Units
D/980A/3
dBc
dBc
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