CMX980AL7 CML Microcircuits, CMX980AL7 Datasheet - Page 72
![no-image](/images/no-image-200.jpg)
CMX980AL7
Manufacturer Part Number
CMX980AL7
Description
TETRA Baseband Processor
Manufacturer
CML Microcircuits
Datasheet
1.CMX980AL7.pdf
(108 pages)
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CMX980AL7
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TETRA Baseband Processor
Title:
Address:
Function:
Description:
7:0
7:0
7:0
7:0
Bit
1999 Consumer Microcircuits Limited
RxIGainLSB
RxIGainMSB
RxQGainLSB
RxQGainMSB
RxIQGainMult
Receive I and Q channel Gain Multiplier register
$0x30, $0x31, $0x34 and $0x35 (4 locations)
RW
A 2s-complement multiplication is performed on the magnitude of the Rx Data path signal and
the result is then re-normalised to the system’s dynamic range: thus the function may be
considered as a digital attenuator. The value is signed 2s-complement therefore phase inversion
of the channel data can be achieved by using negative numbers. This multiplication is applied
to the Rx signal after the ADC decimation filter, but before offset adjustment and the two 63-tap
FIR filters. This register sets the multiplier, the result being given by the formula:
Name
Address $0x30
Address $0x31
Address $0x34
Address $0x35
D
out
Data
Data
Data
Data
Active State
D
in
RW
RW
RW
RW
G
2
val
15
Least significant 8 bits of the RxIGain register (G
Most significant 8 bits of the RxIGain register (G
Least significant 8 bits of the RxQGain register (G
Most significant 8 bits of the RxQGain register (G
Where:
72
G
D
D
val
in
out
is the signal input,
is the signal output,
is the value in the register.
Function
val
val
val
).
val
).
).
).
CMX980A
D/980A/3
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