HFC-SUSB Cologne Chip AG, HFC-SUSB Datasheet - Page 27
![no-image](/images/no-image-200.jpg)
HFC-SUSB
Manufacturer Part Number
HFC-SUSB
Description
Isdn S/t HDLC Basic Rate Controller
Manufacturer
Cologne Chip AG
Datasheet
1.HFC-SUSB.pdf
(82 pages)
- Current page: 27 of 82
- Download datasheet (940Kb)
863C EC2
3.1.3 Writing the USB configuration EEPROM
The EEPROM can be programmed in an existing USB device. The EEPROM Programming Spec. is only
available on special request to avoid destruction of configuration information by not authorized programs
or software viruses.
3.1.4 Standard device requests
The USB Specification 1.1. makes a difference for standard device requests in Address state and in
Configured state. In Address state a device should not accept some standard device requests. Even in
Address state the HFC-S USB reacts as being in Configured state. Furthermore the HFC-S USB behavior
is independent of a selected configuration or interface value. In both states a Get Configuration returns
the configuration value set by Set Configuration and Get Interface returns the interface value set by Set
interface. The HFC-S USB behaves to all standard device requests (chapter 9.4 of the USB Specification
1.1, except 9.4.8 Set Descriptor and 9.4.11 Synch Frame which are not supported) in Address state as if
in Configured state.
3.2
The HFC-S USB has an integrated 8 bit microprocessor interface. The processor interface is enabled in
Active USB Mode (mode 2) only. Pin A0 is the address input. The data bus is PORT_D[7:0]. The inputs
/RD and /WR are used to control read and write operations.
3.2.1 Register access by microprocessor interface
The HFC-S USB has 2 addresses in Active USB Mode (mode 2). The lower address (A0 = '0') is used for
data read/write. The higher address (A0 = '1') is write only and is used for register selection. Registers are
selected by first setting A0 to '1' and then writing the address of the desired register to the data bus
PORT_D[7:0]. All following accesses to the HFC-S USB with A0 = '0' are read/write operations to this
register.
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Microprocessor interface
Cologne
Chip
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