HFC-SUSB Cologne Chip AG, HFC-SUSB Datasheet - Page 39

• Manufacturer Part Number: HFC-SUSB
• Description: Isdn S/t HDLC Basic Rate Controller
• Manufacturer: Cologne Chip AG

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Name
INT_S1
*
The interrupts indicated in the INT_S1 register are frame interrupts which occur in HDLC mode.
In transparent mode an interrupt can be generated on a regular basis. Interrupt frequency can be
selected in the CON_HDLC register.
note!
Addr.
10h
Bits
0
1
2
3
4
5
6
7
r/w Function
r
r
r
r
r
r
r
r
'1'
B1-channel interrupt status in receive direction
'1'
B2-channel interrupt status in transmit direction
'1'
B2-channel interrupt status in receive direction
'1'
D-channel interrupt status in transmit direction
'1'
D-channel interrupt status in receive direction
'1'
PCM-channel interrupt status in transmit direction
'1'
PCM-channel interrupt status in receive direction
'1'
B1-channel interrupt status in transmit direction
a complete frame has been transmitted, the frame counter
F2 has been incremented
a complete frame has been transmitted, the frame counter
F1 has been incremented
a complete frame has been transmitted, the frame counter
F2 has been incremented
a complete frame has been transmitted, the frame counter
F1 has been incremented
a complete frame was transmitted, the frame counter
F2 was incremented
a complete frame was transmitted, the frame counter
F1 was incremented
a complete frame was transmitted, the frame counter
F2 was incremented
a complete frame was transmitted, the frame counter
F1 was incremented
Cologne
Chip
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