HFC-SUSB Cologne Chip AG, HFC-SUSB Datasheet - Page 38

• Manufacturer Part Number: HFC-SUSB
• Description: Isdn S/t HDLC Basic Rate Controller
• Manufacturer: Cologne Chip AG

863 C EC2
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Name
FIF_F1
[FIFO#]
FIF_F2
[FIFO#]
FIF_Z1
[FIFO#]
FIF_Z2
[FIFO#]
F_THRES
F_FILL
Addr.
0Ch
0Dh
0Ch
1Bh '0'
04h
06h
'1'
Bits
7..0
7..0
7..0
7..0
3..0
7..4
0
1
2
3
4
5
6
7
Number of bytes in the following FIFOs is lower than the value defined
in the F_THRES register.
Number of bytes in the following FIFOs is greater or equal than the
value defined in the F_THRES register.
r/w Function
w
w
r
r
r
r
r
r
r
r
r
r
r
r
FIFO input HDLC frame counter (F1)
Up to 7 HDLC frames can be stored in each FIFO.
FIFO output HDLC frame counter (F2)
Up to 7 HDLC frames can be stored in each FIFO.
FIFO input counter (Z1)
FIFO output counter (Z2)
B1-transmit, B2-transmit, D-transmit and PCM-transmit (see
also F_FILL)
'0000' 0 bytes
'0001' 8 bytes (reset default)
:
'1111' 120 bytes
The corresponding bit(s) in the F_FILL register are set if the
number of bytes in a transmit FIFO is greater or equal than this
value.
receive FIFO (IN transfer on endpoints 1..8) threshold for B1-
receive, B2-receive, D-receive and PCM-receive (see also
F_FILL)
'0000' 0 bytes
'0001' 8 bytes (reset default)
:
'1111' 120 bytes
The corresponding bit(s) in the F_FILL register are set if the
number of bytes in a receive FIFO is greater or equal than this
value.
B1-transmit
B1-receive
B2-transmit
B2-receive
D-transmit
D-receive
PCM-transmit
PCM-receive
transmit FIFO (OUT transfer on endpoints 1..8) threshold for
:
:
Cologne
Chip
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