HFC-SUSB Cologne Chip AG, HFC-SUSB Datasheet - Page 49
![no-image](/images/no-image-200.jpg)
HFC-SUSB
Manufacturer Part Number
HFC-SUSB
Description
Isdn S/t HDLC Basic Rate Controller
Manufacturer
Cologne Chip AG
Datasheet
1.HFC-SUSB.pdf
(82 pages)
- Current page: 49 of 82
- Download datasheet (940Kb)
863C EC2
4.5
:e\i " !
Name
STATES
(read)
STATES
(write)
*
The S/T state machine is stuck to '0' after a reset.
In this state the HFC-S USB sends no signal on the S/T-line and it is not possible to activate it by
incoming INFOx.
Writing a '0' to bit 4 of the STATES register restarts the state machine.
NT mode: The NT state machine does not change automatically from G2 to G3 if the TE side
sends INFO3 frames. This transition must be activated each time by bit 7 of the STATES register
or by setting bit 0 of the SCTRL_E register.
important!
S/T section registers
Addr.
30h
30h
Bits
3..0
3..0
6..5
4
5
6
7
4
7
r/w Function
w
w
w
w
r
r
r
r
r
binary value of actual state (NT: Gx, TE: Fx)
Frame-Sync ('1'=synchronized)
'1' timer T2 expired (NT mode only, see also 8.1 S/T interface
'1' receiving INFO0
'1' in NT mode: transition from G2 to G3 is allowed.
Set new state xxxx (bit 4 must also be set to load the state).
'1' loads the prepared state (bit 3..0) and stops the state
'0' enables the state machine.
'00' no operation
'01' no operation
'10' start deactivation
'11' start activation
The bits are automatically cleared after activation/deactivation.
'0' no operation
'1' in NT mode: allows transition from G2 to G3.
This bit is automatically cleared after the transition.
activation/deactivation layer 1 for finite state matrix for NT
on page 73)
machine. This bit needs to be set for a minimum period of
5.21 s and must be cleared by software.
(reset default)
After writing an invalid state the state machine goes to
deactivated state (G1, F2)
Cologne
Chip
$) _V ("
Related parts for HFC-SUSB
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![HFC-S](/images/no-image3.png)
Part Number:
Description:
Isdn S/t HDLC Basic Rate Controller
Manufacturer:
Cologne Chip AG
Datasheet:
![HFC-S+](/images/no-image3.png)
Part Number:
Description:
Isdn S/t HDLC Basic Rate Controller
Manufacturer:
Cologne Chip AG
Datasheet:
![HFC-4S](/images/no-image3.png)
Part Number:
Description:
Isdn HDLC Fifo Controller With 8 (4) Integrated S/t Interfaces
Manufacturer:
Cologne Chip AG
Datasheet:
![HFC-SP](/images/no-image3.png)
Part Number:
Description:
Isdn S/t HDLC Basic Rate Controller
Manufacturer:
Cologne Chip AG
Datasheet:
![HFC-SPCI](/images/no-image3.png)
Part Number:
Description:
Isdn S/t HDLC Basic Rate Controller
Manufacturer:
Cologne Chip AG
Datasheet:
![HFC](/images/no-image3.png)
Part Number:
Description:
Cutting-edge Technologies Of Emi/emc Solutions Hfc Series High Freq. Wound Ceramic Chip Inductors
Manufacturer:
Mag .Layers Scientific-Technics Co.,Ltd
Datasheet:
![HFC-100](/images/no-image3.png)
Part Number:
Description:
Temperature & Velocity Measurement
Manufacturer:
Advanced Thermal Solutions, Inc.
Datasheet:
![HFC-S2M](/images/no-image3.png)
Part Number:
Description:
Isdn HDLC Fifo Controller With Primary Rate Interface
Manufacturer:
Cologne Chip AG
Datasheet:
![HFC-Smini](/images/no-image3.png)
Part Number:
Description:
Manufacturer:
Cologne Chip AG
Datasheet:
![HFC-U](/images/no-image3.png)
Part Number:
Description:
Isdn HDLC Basic Rate Controller
Manufacturer:
Cologne Chip AG
Datasheet: