MT90221 Zarlink Semiconductor, MT90221 Datasheet - Page 17

• Manufacturer Part Number: MT90221
• Description: Quad Inverse Multiplexing For Atm (IMA) Device With Flexible Ima And Uni Mode
• Manufacturer: Zarlink Semiconductor

MT90221
1.0 Device Architecture
The MT90221, supported by software, implements
the
Asynchronous Transfer Mode (IMA) Specification.
This approach minimizes the impact of any changes
that might occur in the specification. Actions are
implemented by the MT90221 and decisions by the
software.
The MT90221 supports the following two major
modes of operation:
•
•
Up to four IMA Groups can be implemented. Any of
the
dynamically to any of these IMA Groups. A different
UTOPIA PHY address is assigned to each of the IMA
Groups.
The UNI mode is used to transfer the cells from the
UTOPIA Interface to a PCM port without any
overhead. Up to 4 UTOPIA PHY addresses can be
supported in UNI mode.
The MT90221 also supports a mixed mode where
the PCM Interfaces not assigned to an IMA Group
can be used in UNI mode.
The IMA implementation is divided into hardware
and software functions. The MT90221 implements
the hardware functions. The software functions are
implemented by the user. The hardware and
software functions are described below. Notice that a
number of MT90221 functions are included to assist
in the collection of statistical information. This
information supports the MIB implementation.
1.1
For
specification, the following functions must be
implemented by software:
•
•
•
•
1.1.1
The software implemented transmit and receive
LSMs are independent (i.e., each link has its own
LSM). LSMs rely on various events from the
8
the IMA mode (as defined by the ATM Forum
IMA Specification)
the User Network Interface (UNI) mode
the transmit and receive Link State Machines
(LSM)
the IMA Group State Machines (GSM)
the IMA Group Traffic State Machines (GTSM)
the Operations and Maintenance (OAM)
functions
four
the
Software Functions
ATM
Link State Machines
MT90221
PCM
Forum
Interfaces
to
Inverse
comply
can
Multiplexing
with
be
the
assigned
IMA
for
MT90221 interface, such as cell errors, excessive
delay between-links, etc.; or, from the T1 or E1
framer, such as Loss Of Signal (LOS), Loss Of
Frame (LOF), Remote Alarm Indication (RAI) etc.
On-chip registers are used to generate the ICP cells
that communicate the LSM states to the Far End
(FE).
1.1.2
The IMA GSMs and Group Traffic State Machines
(GTSM) must be implemented in software. One of
each state machine should be implemented for each
IMA Group.
On-chip registers are used to generate the ICP cells
that communicate the various states to the FE.
1.1.3
The addition, removal or restoration of a link is
controlled by software using the various control
registers in the MT90221 and in the T1 or E1
framers. Decisions are based on the MT90221 and
T1 or E1 framers status registers.
1.1.4
The MT90221 provides numerous registers and
counters to implement a polling and/or interrupt
mechanism for tracking link and IMA Group status.
This traffic in and out information is used by the
Management Information Base (MIB) for each IMA
Group.
1.1.5
The microprocessor controls the operation of the T1
or E1 link by providing handshaking between the FE
and Near Ends (NE) including such functions as
signaling and loopback controls. Rate adjustment is
controlled by:
•
•
1.1.6
Software implements most of the performance
monitoring.
information for:
•
•
•
•
adding or removing one or more T1 or E1 links
providing feedback to the ATM network for adjust-
ing the ATM traffic.
the Cell Delineation Block and IMA Frame State
Machine
the number of ICP violations
the total number of cells
the number of idle or discarded cells.
IMA Group State Machines
Link Addition, Removal or Restoration
Interrupt
Signaling and Rate Adjustment
Performance Monitoring
The
MT90221
provides
status