MT90221 Zarlink Semiconductor, MT90221 Datasheet - Page 21

• Manufacturer Part Number: MT90221
• Description: Quad Inverse Multiplexing For Atm (IMA) Device With Flexible Ima And Uni Mode
• Manufacturer: Zarlink Semiconductor

MT90221
The clocking mode and reference link are fixed once
an IMA Group is setup and should remain
unchanged so long as that group is operational. The
reference link should not change unless problems
are reported with the link.
2.4.4
The Stuff event algorithm differs between CTC and
ITC modes. In CTC mode, the Stuff event is typically
fixed and appears in the same IMA frame on all IMA
Group links. In ITC mode, the Stuff event is
determined using an adaptive algorithm that relates
the level of the internal TX Link FIFO to that of the
TX link FIFO of the Reference link.
The MT90221 implements 2 different stuffing
algorithms: a fixed stuffing rate and an adaptive
stuffing rate. The Stuffing events do not happen
more frequently than once every five IMA frames.
TX Group Control Mode register bit 3 selects either
the adaptive or fixed algorithm. Bit 4 determines the
timing mode declared in the ICP cell.
There are three possible combinations:
•
•
•
In CTC mode, when using the Fixed algorithm, the
Stuff event is periodic and will appear in the same
IMA frame, once every 2048 cells, on each link that
is part of the IMA Group.
In CTC mode, when using the Adaptive algorithm,
the Stuff event will occur at an average rate of once
every 2048 cells on each link and may not occur in
the same IMA Frame on all the links.
In ITC mode, the Stuff event is determined using the
adaptive algorithm that relates the level of the
internal TX Link FIFO with that of the TX Link FIFO
of the Reference link. The reference link has one
Stuff event every 2048 cells.
The state of bit seven in the TX IMA Control register
determines whether a Stuff indication is generated in
the first or first four frames preceding a Stuff event.
2.4.5
The MT90221 computes the internal TX IMA Data
Cell Rate (IDCR) for each IMA Group. The cell rate
for the IMA Group reference link, specified in the TX
Group Control Mode register, is integrated over a
programmable
integration period is programmed in the TX IDCR
12
CTC Mode with internal Fixed algorithm
CTC Mode with internal Adaptive algorithm
ITC Mode with internal Adaptive algorithm
Stuff Cell Rate
IMA Data Cell Rate
period
of
time.
The
preferred
Integration register and the value is indicated in
Table 1
2.4.6
The IMA controller produces the cell stream to be
sent to the PCM blocks using the following four cell
types:
•
•
•
•
At an IDCR clock tick, the RoundRobin scheduler
inserts either an ICP cell, a User cell or a Filler cell
into the TX Link FIFO of the next link of the IMA
group, based on ascending link ID numbers. An ICP
cell is inserted every M cells and a stuff event is
inserted when indicated by the stuffing algorithm.
If it is not time for an ICP cell and if the traffic is not
enabled for the link (see bit 6 of the TX Link Control
register), then a Filler cell is inserted in the TX Link
FIFO. If the traffic is enabled and there is a User cell
in the TX Utopia FIFO, then the User cell is
transferred from the TX UTOPIA FIFO to the TX Link
FIFO. If there is no User cell in the TX UTOPIA FIFO,
then a Filler cell is inserted in the TX Link FIFO.
2.4.7
Once per IMA frame, an ICP cell is transmitted on
each link of the IMA Group. The content of the ICP
cell is controlled both by MT90221 and software. The
software content of the ICP cell bytes is stored in
buffer RAM. A copy of the ICP cell for each group is
kept in the internal Transmitter Cell RAM.
The ICP cell to be transmitted on each link is
assembled on an as required basis under the control
of the internal RoundRobin scheduler and ICP Cell
Modifier.
Hardware controls the following bytes of the ICP cell:
•
•
T1 ISDN (23 channels)
Data cells received from the UTOPIA port (User
cells)
Filler cells
IMA ICP cells with Link status information
Stuff cells
Byte 5 - the HEC is always calculated and
inserted by the MT90221
Byte 6 - the TX OAM Label is defined by the
software and the value contained in this
T1 (24 channels)
E1 (30 channels)
Table 1 - IDCR Integration Register Value
PCM Mode
IMA Controller (RoundRobin Scheduler)
ICP Cell Generator
TX IDCR Integration
0x0C (2
0x0B (2
0x09 (2
Preferred Value
register
16
18
19
clocks)
clocks)
clocks)