MT90221 Zarlink Semiconductor, MT90221 Datasheet - Page 23

• Manufacturer Part Number: MT90221
• Description: Quad Inverse Multiplexing For Atm (IMA) Device With Flexible Ima And Uni Mode
• Manufacturer: Zarlink Semiconductor

MT90221
The SCCI field is incremented by one for each
transfer command performed
change in at least one byte of the ICP cell.
2.4.8
An optional interrupt is provided at the end of an IMA
frame to simplify software implemented changes in
the Group Control and Status field. This interrupt can
be enabled on an as required and per group basis to
implement a frame counter. The TX ICP Cell
Handler and TX ICP Interrupt Enable registers are
used for the transfer ready and frame interrupt.
2.4.9
The content of the Filler cell is pre-initialized and
conforms with the IMA Specification.
2.4.10 TX IMA Group Start-Up
Initialize the TX IMA Group start-up as follows:
(Note: The startup procedure below is given
indicating the most important steps. A more detailed
and complete sequence can be found in the
MT90220/221 Programmer’s Manual and example
code)
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2.4.11 TX Link Addition
The MT90221 supports software controlled link
addition to the existing IMA group. Link addition is
used to increase the available bandwidth. The TX
PCM Link Control register 1 and 2, the TX Link ID
and TX ICP Cell Offset registers are initialized first
14
Configure the TX PCM port(s) by writing to the
TX PCM Link Control register 1 and 2.
Write the value of M, the Timing Mode and the
reference link number to the TX Group Control
register corresponding to the IMA Group
number to be initialized.
Write the Link ID (LID is between 0-31) to TX
Link ID registers for each link to be used in the
IMA Group. LID should not be changed when a
group is operational. Ensure each link that is
part of an IMA group has a unique LID (note
that the MT90221 does not verify LIDs).
Write the ICP Cell Offset value to TX ICP Cell
Offset registers. This value depends on the
value of M. Typically, the reference link will have
a delay of 0 cells in the IMA Frame and the ICP
cell in each other link will be evenly spaced in a
multiple of M/N cells (where M is defined in the
IMA specification and N is the number of links).
The offset value for an operational group should
not be changed.
Write to the TX Link Control registers to put
the link(s) in IMA mode and to enable the
transfer of ATM User Cells when required.
IMA Frame Programmable Interrupt
Filler Cell Definition
which includes a
with the proper IMA Group information. The link is
assigned to a TX IMA group by writing to the lower 2
bits of the TX Link Control register. The bit 3, 1 and
0 of the Test 2 register have to be written with the
proper value. The link is then configured in IMA
mode by writing to the bit 2 of the TX Link Control
register. The TX IMA Mode Status register is
monitored to detect when the link is reported in IMA
mode. When the link is in IMA mode, then the bit 3, 1
and 0 of the Test 2 register are reset to 0. TX Link
Control register bit 6 determines when ATM User
cells can be sent. Note that the Test 2 register
cannot be used as a read/modify/write register. The
values that are written and the values that are read
are independant. Note also that the bit 6 of the Test
2 register shulld always be set to 1.
2.4.12 TX Link Deletion
There are two reasons to remove a link: the required
bandwidth decreases or a link becomes faulty. The
MT90221 supports link deactivation under software
control.
A link stops transmitting User cells when bit 6 of the
TX Link Control register is set to 0. Filler and ICP
cells will still be sent on the link. The link is removed
from an IMA group by first setting the bit 2 of the TX
Link Control register to 1 while keeping the original
IMA group number. The IMA group number can be
changed only when the link is reported in UNI mode
as reported in the TX IMA Mode Status register. It
then can be assigned to another IMA group.
When removing the last link of a TX IMA group, the
TX Utopia FIFO has to be empty. This can easily be
done by first disabling the source of ATM cells (ATM
Utopia contoller), then disabling the TX Utopia Port
using the UTOPIA Input Link or Group PHY Enable
registers while still keeping the “Send User Cell” bit
of the TX Link Control register set to 1. After a period
of time corresponding to “n” IDCR clock tick has
elapsed, then the above procedure can be applied to
assign the link in UNI mode.” The value of “n”
depends on the size of the TX Utopia FIFO as
defined in the TX FIFO Length Definition registers.
The level of the TX Utopia FIFO can be monitored
using TX Utopia FIFO Level register. Then, the
above procedure can be applied to assign the link in
UNI mode.
2.5
A maximum of four independent T1/E1 interfaces
can be selected in UNI mode. Figure 4 gives a
functional block diagram of the transmitter in UNI
mode.
ATM Transmit Path in UNI Mode