MT90221 Zarlink Semiconductor, MT90221 Datasheet - Page 77

• Manufacturer Part Number: MT90221
• Description: Quad Inverse Multiplexing For Atm (IMA) Device With Flexible Ima And Uni Mode
• Manufacturer: Zarlink Semiconductor

MT90221
68
Address (Hex):
Direct access
Reset Value (Hex):
Address (Hex):
Direct access
Reset Value (Hex):
Bit #
Bit #
6:5
4:3
1:0
4:0
7
2
7
6
5
Type
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
Writing a 1 forces the deselecting of the selected clock when it failed.
Reserved. Set to 0 for normal operation.
These 2 bits are used to select the source for the signal at PLLREF1:
The valid combinations are:
00: RXCK0
01: RXCK1
10: RXCK2
11: RXCK3
Reserved. Write 0 for normal operation.
These 2 bits are used to select the source for the signal at PLLREF0:
The valid combinations are:
00: RXCK0
01: RXCK1
10: RXCK2
11: RXCK3
Clock Running Status: Cleared by writing to this register, set by the running clock
Toggle on every transition of the selected clock
Reserved.Write 0 for normal operation.
These 5 bits are used to select the clock that is to be verified: The valid combinations are:
00000: REFCK0
00001: REFCK1
00010: REFCK2
00011: REFCK3
00100: TXCK0
00101: TXCK1
00110: TXCK2
00111: TXCK3
01100: RXCK0
01101: RXCK1
01110: RXCK2
01111: RXCK3
10000: RXCK4
10001: RXCK5
10010: RXCK6
10011: RXCK7
098
00
099
00
Table 83 - PLL Reference Control Register
Table 84 - Clock Activity Register
Description
Description