MTC-20172-PC AMI Semiconductor, Inc., MTC-20172-PC Datasheet - Page 102
MTC-20172-PC
Manufacturer Part Number
MTC-20172-PC
Description
S Interface Circuit for ISDN (SIC)
Manufacturer
AMI Semiconductor, Inc.
Datasheet
1.MTC-20172-PC.pdf
(104 pages)
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13.3 Requirements for the Input and Output Stage
In the receive path the So-interface is
terrninated with 50Ω (1 00Ω in the
NT and 1 00Ω at the end of the So-
bus). The input stage of the MTC-
20172 SIC is fully differential.
A capacitance to ground as in the is
not necessary and should be removed
to benefit the higher immunity to
common mode signals. The path also
must contain 2 series resistances of
5KΩ to fuKil the CCITT 1.430 input
impedance requirement. Protection
circuitry must be present after the
secondary of the transformer to make
sure the SRP and SRN pin are not
stressed higher than VDD+0.6V or
lower than VSS-0.6V.
To fulfill the CCITT 1.430 requirement
that the transmitter impedance must be
≥ 20Ω seen at the So-interface
Fig. 13.3 : Schematic of MTC-20172 input and output stage
(so 80Ω seen at the secondary of the
1:2 transformer). To fuifil the CCITT
1.430 pulse amplitude requirement of
750mV over 50Ω at the So- bus, the
MTC-20172 SIC driver has been
designed as a current limited voitage
source of 2.1V. With an extra series
resistance of 80Ω in the transmit path
both CCITT 1.430 requirements are
met. The series resistance includes the
transformer primary and secondary
series resistance and the resistance of
the connecting cord. A vaiue of
2x34Ω is recommended for the
external resistors. Protection circuitry
must be present after the secondary of
the transformer to make sure the SXP
and SXN pin are not stressed higher
than VDD+0.6V or lower than VSS-
0.6V.
92
MTC-20172
Data Sheet & Reference Manual
Rev. 1.1 February 1997
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