MTC-20172-PC AMI Semiconductor, Inc., MTC-20172-PC Datasheet - Page 29
MTC-20172-PC
Manufacturer Part Number
MTC-20172-PC
Description
S Interface Circuit for ISDN (SIC)
Manufacturer
AMI Semiconductor, Inc.
Datasheet
1.MTC-20172-PC.pdf
(104 pages)
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4.11 Modes
The TABLE 4.1 shows all Basic and
Extended modes, as they are
implemented in the MTC-20172 SIC.
The mode is determined by the state of
the MOD2-0, XTR0-4, SCLK pins, as
shown in Table 4.2.
Table 4.1.a: Basic modes of operation with the MTC-20172 SIC
*: Indicates signals synchronized with the So-Interface
#: Automatic selection between inverted and GCI mode
Operation Inverted
of IOM
interface
MOD2
MOD1
MOD0
DCLK
DFR
SCLK
(CP)
XTR3
(X3)
XTR2
(X2)
XTR1
(X1)
XTR0
(X0)
AUX4
AUX3
AUX2
XTR4
AUX1
of Operation
TE
Mode
0
0
0
o:
512kHz*
o:
8 kHz*
o:*
1536kHz
i: ENCK
o:
2560kHz
o:
3840kHz
o: RDY
o:
o: BER
i:
i: X4
i:
TE
Inverted V*
Mode
0
0
1
o:
512kHz*
o:
8 kHz*
o:*
1536kHz
i: ENCK
o:
1280kHz
o:
3840kHz
o: RDY
o:
o: BER
i:
i: X4
i:
TE
Mode
0
1
0
o:
512kHz*
o:
8 kHz*
o:
512kHz*
i: ENCK
o: ECHO
o:
3840kHz
i: CON
o: RDY
o: BER
i:
i: X4
i:
The range of the DCLK clock is
extended to any allowed GCI value,
i.e. any multiple of 16 kHz above
512 kHz. The AUX1-4 pins offer extra
input and output signals, as explained
in 4.12.
LT-T
GCI
Mode or
Inverted
Mode#
0
1
1
i:
IOM
i:
8 kHz
o:
512kHz*
i: fixed
at 1
i: TS2
i: TS1
i: TS0
o: RDY
o: BER
i:
i: X4
i:
APPLICATION
19
LT-T
V*
Mode
0
1
1
i:
V*
i:
8 kHz
o:
512kHz*
i: fixed
at 0
i: fixed
at 0
i: fixed
at 0
i: CON
o: RDY
o: BER
i:
i: X4
i:
NT
V*
Mode
1
1
1
i:
V*
i:
8 kHz
i: /SCZ
i: BUS
i: /SSZ
i: DEX
i/o: DE
o:
o: BER
i:
i: X4
i: MFD
MTC-20172
Data Sheet & Reference Manual
Rev. 1.1 February 1997
o: = output
i: = input
LT-S
GCI
Mode or Mode
Inverted
Mode#
1
0
0
i:
V*
i:
8 kHz
i: fixed
at 0
i: BUS
i: TS2
i: TS1
i: TS0
i/o: DE
o: BER
i:
i: X4
i: DEX
LT-S
1
1
0
i:
V*
i:
8 kHz
i: fixed
at 0
i: BUS
i: fixed
at 0
o:
7680kHz 7680kHz
i: fixed
at 0
i/o: DE
o: BER
i:
i: X4
i: DEX
V*
LT-S
V*
Mode
1
1
0
i:
V*
i:
8 kHz
i: fixed
at 0
i: BUS
o:
192kHz*
o:
i: fixed
at 1
i/o: DE
o: BER
i:
i: X4
i: DEX
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