MTC-20172-PC AMI Semiconductor, Inc., MTC-20172-PC Datasheet - Page 35

• Manufacturer Part Number: MTC-20172-PC
• Description: S Interface Circuit for ISDN (SIC)
• Manufacturer: AMI Semiconductor, Inc.

5.1.8 Synchronization
Principles, with Adaptive
Bit-timing
1) The receiver first finds the AMI
2) Immediate bit-synchronization is
3) The distance rule of the next
4) Frame synchronization is acquired
5) The F-L transition of each frame
6a) At TE/LT-T, loss of sync after two
6b) At NT/LT-S, loss of sync after two
violations by oversampling.
given by the F-L transition.
violation within 14 positions is
used to validate the F-bit.
after 3 correct frames, with a
correct F-bit violation and a
second one within 14 bit
positions.
locks a DPLL based on the crystal
frequency in the TE/LT-T case. In
the NT/LT-S, the F-L transition
determines the adaptive bit
sampling.
frames not having F violation, or
the second violation not following
the distance rule at 14 bit. After
the loss of sync, the TE/LT-T sends
idle (INFO0, uplink).
frames not having F violation, or
second violation following the
distance rule (at 14 bits), when no
multiframing is active. The
downlink signal stays active, but
changes automatically from
INFO4 to INFO2. In the case of
multiframing, the missing second
violation within the 14 bit
distance, or the missing violation
at the next F bit (for uplink frames
with the corresponding downlink
FA bit at binary 1), is ignored.
25
MTC-20172
Data Sheet & Reference Manual
Rev. 1.1 February 1997
5.1.9 Synchronization
Principles, Fixed Bus Timing at
NT/LT-S
On a short passive bus, the position of
the bit sampling can be fixed. The
points 3), 4) and 6b) of the previous
paragraph are executed. No
oversampling is done, no DPLL action
is needed to track the F-L edge. Note
that the fixed timing is changed
automatically to adaptive timing,
when internal analog S-bus loops are
requested. When EXTERNAL S-bus
loops are used (e.g. for production
test), only adaptive timing is suitable.
5.1.10 Pulse Polarity in the S-
bus Frame
The receiver is polarity independent.
The transmitter in NT and LT-S mode
has no polarity requirements. The
transmitter in TE/LT-T must have a
fixed polarity to allow a bus operation
with multiple sources. See also 5.2.1.