sc3200 Advanced Micro Devices, sc3200 Datasheet - Page 361

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sc3200

Manufacturer Part Number
sc3200
Description
Geode-tm Sc3200 Processor
Manufacturer
Advanced Micro Devices
Datasheet

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Video Processor Module - Video Processor Registers - Function 4
AMD Geode™ SC3200 Processor Data Book
Offset 90h-93h
Offset 94h-97h
Alpha values may be automatically incremented/decremented for successive frames. This register can be used to read the alpha values
that are being used in the current frame.
Offset 98h-3FFh
Offset 400h-403h
Selects various Video Processor modes.
Offset 404h-407h
Offset 408h-40Bh
Offset 40Ch-41Fh
31:28
27:16
15:11
31:24
23:16
10:0
15:8
27:4
31:0
Bit
7:0
1:0
31
30
29
28
3
2
Table 7-7. F4BAR0+Memory Offset: Video Processor Configuration Registers (Continued)
Description
Reserved. Set to 0.
VIDEO_X_REQ (Video Horizontal Request). Determines the horizontal (pixel) location at which to start requesting video
data out of the video FIFO. This value is calculated according to the following formula:
Value = Desired screen position + (H_TOTAL – H_SYNC_END) – 2.
Reserved
VIDEO_Y_REQ (Video Vertical Request). Determines the line number at which to start requesting video data out of the
video FIFO. This value is calculated according to the following formula:
Value = Desired screen position + (V_TOTAL – V_SYNC_END) + 1.
Reserved.
ALPHA3_VAL (Value for Alpha Window 3).
ALPHA2_VAL (Value for Alpha Window 2).
ALPHA1_VAL (Value for Alpha Window 1).
Video FIFO Underflow (Empty).
0: No underflow has occurred.
1: Underflow has occurred.
Write 1 to reset this bit.
Video FIFO OverFlow (Full).
0: No overflow has occurred.
1: Overflow has occurred.
Write 1 to reset this bit.
Reserved. Write as read.
Reserved. Write as read.
Reserved. Set to 0.
Reserved. Write as read.
Note:
VID_SEL (Video Select). Selects the source of the video data.
00: GX1 module.
10: VIP block.
01: Reserved.
11: Reserved.
The GX1 module’s video clock must be active at all times, regardless of the source of video input.
Reserved.
Reserved. Write as read.
Video Processor Display Mode Register (R/W)
Video Processor Test Mode Register (R/W)
Video Request Register (R/W)
Alpha Watch Register (RO)
Reserved
Reserved
Reserved
Revision 5.1
Reset Value: 001B0017h
Reset Value: 00000000h
Reset Value: 00000000h
Reset Value: 00000000h
Reset Value: 00000000h
361

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